From patchwork Fri Apr 15 08:11:09 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 710301 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p3F8BaFZ017297 for ; Fri, 15 Apr 2011 08:11:36 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751718Ab1DOILf (ORCPT ); Fri, 15 Apr 2011 04:11:35 -0400 Received: from na3sys009aog108.obsmtp.com ([74.125.149.199]:55356 "EHLO na3sys009aog108.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750857Ab1DOILc (ORCPT ); Fri, 15 Apr 2011 04:11:32 -0400 Received: from mail-ww0-f50.google.com ([74.125.82.50]) (using TLSv1) by na3sys009aob108.postini.com ([74.125.148.12]) with SMTP ID DSNKTaf9s8Yt5foxuTZVZ/H829q25HwnHRGc@postini.com; Fri, 15 Apr 2011 01:11:32 PDT Received: by mail-ww0-f50.google.com with SMTP id 33so2335519wwc.7 for ; Fri, 15 Apr 2011 01:11:31 -0700 (PDT) Received: by 10.227.153.152 with SMTP id k24mr1798610wbw.3.1302855091298; Fri, 15 Apr 2011 01:11:31 -0700 (PDT) Received: from deskari (a62-248-131-233.elisa-laajakaista.fi [62.248.131.233]) by mx.google.com with ESMTPS id y12sm1450529wby.8.2011.04.15.01.11.29 (version=SSLv3 cipher=OTHER); Fri, 15 Apr 2011 01:11:30 -0700 (PDT) From: Tomi Valkeinen To: linux-omap@vger.kernel.org, linux-fbdev@vger.kernel.org Cc: archit@ti.com, Tomi Valkeinen Subject: [PATCH 3/5] OMAP: DSS2: Fix: Return correct lcd clock source for OMAP2/3 Date: Fri, 15 Apr 2011 11:11:09 +0300 Message-Id: <1302855071-5510-4-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1302855071-5510-1-git-send-email-tomi.valkeinen@ti.com> References: <1302855071-5510-1-git-send-email-tomi.valkeinen@ti.com> Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 15 Apr 2011 08:11:36 +0000 (UTC) From: Archit Taneja dss.lcd_clk_source is set to the default value DSS_CLK_SRC_FCK at dss_init. For OMAP2 and OMAP3, the dss.lcd_clk_source should always be the same as dss.dispc_clk_source. The function dss_get_lcd_clk_source() always returns the default value DSS_CLK_SRC_FCK for OMAP2/3. This leads to wrong clock dumps when dispc_clk_source is not DSS_CLK_SRC_FCK. Correct this function to always return dss.dispc_clk_source for OMAP2/3. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dss.c | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 3f1fee6..c3b48a0 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -385,8 +385,14 @@ enum dss_clk_source dss_get_dsi_clk_source(void) enum dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel) { - int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; - return dss.lcd_clk_source[ix]; + if (dss_has_feature(FEAT_LCD_CLK_SRC)) { + int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; + return dss.lcd_clk_source[ix]; + } else { + /* LCD_CLK source is the same as DISPC_FCLK source for + * OMAP2 and OMAP3 */ + return dss.dispc_clk_source; + } } /* calculate clock rates using dividers in cinfo */