From patchwork Mon Jun 27 17:31:05 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dima Zavin X-Patchwork-Id: 921722 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p5RHVY40011829 for ; Mon, 27 Jun 2011 17:31:34 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752879Ab1F0Rbc (ORCPT ); Mon, 27 Jun 2011 13:31:32 -0400 Received: from smtp-out.google.com ([74.125.121.67]:54151 "EHLO smtp-out.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752978Ab1F0Rbb (ORCPT ); Mon, 27 Jun 2011 13:31:31 -0400 Received: from hpaq7.eem.corp.google.com (hpaq7.eem.corp.google.com [172.25.149.7]) by smtp-out.google.com with ESMTP id p5RHVQgw026438; Mon, 27 Jun 2011 10:31:26 -0700 Received: from dima.mtv.corp.google.com (dima.mtv.corp.google.com [172.18.102.73]) by hpaq7.eem.corp.google.com with ESMTP id p5RHVPBe001514; Mon, 27 Jun 2011 10:31:25 -0700 Received: by dima.mtv.corp.google.com (Postfix, from userid 17275) id BB70BD1B13; Mon, 27 Jun 2011 10:31:19 -0700 (PDT) From: Dima Zavin To: Tomi Valkeinen Cc: linux-fbdev@vger.kernel.org, linux-omap@vger.kernel.org, Dima Zavin Subject: [PATCH] OMAP: DSS: dispc: enable/disable clocks in error handler Date: Mon, 27 Jun 2011 10:31:05 -0700 Message-Id: <1309195865-23808-1-git-send-email-dima@android.com> X-Mailer: git-send-email 1.7.3.1 X-System-Of-Record: true Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 27 Jun 2011 17:31:34 +0000 (UTC) There's no guarantee that the error handler worker thread will run while the dispc clocks are on. Explicitly enable/disable them. Signed-off-by: Dima Zavin --- drivers/video/omap2/dss/dispc.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 62aa77c..2458248 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -3292,6 +3292,8 @@ static void dispc_error_worker(struct work_struct *work) dispc.error_irqs = 0; spin_unlock_irqrestore(&dispc.irq_lock, flags); + dispc_runtime_get(); + if (errors & DISPC_IRQ_GFX_FIFO_UNDERFLOW) { DSSERR("GFX_FIFO_UNDERFLOW, disabling GFX\n"); for (i = 0; i < omap_dss_get_num_overlays(); ++i) { @@ -3478,6 +3480,8 @@ static void dispc_error_worker(struct work_struct *work) dispc.irq_error_mask |= errors; _omap_dispc_set_irqs(); spin_unlock_irqrestore(&dispc.irq_lock, flags); + + dispc_runtime_put(); } int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout)