From patchwork Mon Aug 27 08:53:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chandrabhanu Mahapatra X-Patchwork-Id: 1376911 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id D28DADF215 for ; Mon, 27 Aug 2012 08:55:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752921Ab2H0IzK (ORCPT ); Mon, 27 Aug 2012 04:55:10 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:58150 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752860Ab2H0IzJ (ORCPT ); Mon, 27 Aug 2012 04:55:09 -0400 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id q7R8t9ZC027774; Mon, 27 Aug 2012 03:55:09 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7R8t8vP006627; Mon, 27 Aug 2012 03:55:08 -0500 Received: from dlelxv24.itg.ti.com (172.17.1.199) by dfle73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.1.323.3; Mon, 27 Aug 2012 03:55:08 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlelxv24.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7R8t76g030052; Mon, 27 Aug 2012 03:55:07 -0500 Received: from localhost (uda0131936.apr.dhcp.ti.com [172.24.137.10]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id q7R8t3r21799; Mon, 27 Aug 2012 03:55:04 -0500 (CDT) From: Chandrabhanu Mahapatra To: CC: , , , Chandrabhanu Mahapatra Subject: [PATCH] OMAPDSS: Correct DISPC_IRQ bit definitions for LCD3 Date: Mon, 27 Aug 2012 14:23:19 +0530 Message-ID: <1346057599-5691-1-git-send-email-cmahapatra@ti.com> X-Mailer: git-send-email 1.7.10 MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org The DISPC_IRQ bit definitions pertaining to channel LCD3 as DISPC_IRQ_VSYNC3, DISPC_IRQ_SYNC_LOST3, DISPC_IRQ_ACBIAS_COUNT_STAT3 AND DISPC_IRQ_FRAMEDONE3 which were incorrectly set in previous LCD3 patches have been corrected here. Reported-by: Mark Tyler Signed-off-by: Chandrabhanu Mahapatra --- include/video/omapdss.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/video/omapdss.h b/include/video/omapdss.h index b868123..9c7cca3 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h @@ -48,10 +48,10 @@ #define DISPC_IRQ_FRAMEDONEWB (1 << 23) #define DISPC_IRQ_FRAMEDONETV (1 << 24) #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25) -#define DISPC_IRQ_FRAMEDONE3 (1 << 26) -#define DISPC_IRQ_VSYNC3 (1 << 27) -#define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 28) -#define DISPC_IRQ_SYNC_LOST3 (1 << 29) +#define DISPC_IRQ_SYNC_LOST3 (1 << 27) +#define DISPC_IRQ_VSYNC3 (1 << 28) +#define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29) +#define DISPC_IRQ_FRAMEDONE3 (1 << 30) struct omap_dss_device; struct omap_overlay_manager;