From patchwork Fri Aug 31 11:34:06 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Courbot X-Patchwork-Id: 1392881 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 20B7E3FDF5 for ; Fri, 31 Aug 2012 11:33:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753357Ab2HaLdU (ORCPT ); Fri, 31 Aug 2012 07:33:20 -0400 Received: from hqemgate04.nvidia.com ([216.228.121.35]:8827 "EHLO hqemgate04.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752687Ab2HaLdP (ORCPT ); Fri, 31 Aug 2012 07:33:15 -0400 Received: from hqnvupgp06.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Fri, 31 Aug 2012 04:32:14 -0700 Received: from hqemhub01.nvidia.com ([172.17.108.22]) by hqnvupgp06.nvidia.com (PGP Universal service); Fri, 31 Aug 2012 04:32:52 -0700 X-PGP-Universal: processed; by hqnvupgp06.nvidia.com on Fri, 31 Aug 2012 04:32:52 -0700 Received: from percival.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.264.0; Fri, 31 Aug 2012 04:32:51 -0700 From: Alexandre Courbot To: Stephen Warren , Thierry Reding , Simon Glass , Grant Likely , Rob Herring , Mark Brown , Anton Vorontsov , David Woodhouse , Arnd Bergmann CC: Leela Krishna Amudala , , , , , , , Alexandre Courbot Subject: [PATCH v5 4/4] tegra: ventana: add pwm backlight DT nodes Date: Fri, 31 Aug 2012 20:34:06 +0900 Message-ID: <1346412846-17102-5-git-send-email-acourbot@nvidia.com> X-Mailer: git-send-email 1.7.12 In-Reply-To: <1346412846-17102-1-git-send-email-acourbot@nvidia.com> References: <1346412846-17102-1-git-send-email-acourbot@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org Signed-off-by: Alexandre Courbot --- arch/arm/boot/dts/tegra20-ventana.dts | 59 ++++++++++++++++++++++++++++++++++- 1 file changed, 58 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index 4ec6b4c..025928d 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -467,6 +467,63 @@ bus-width = <8>; }; + backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>; + default-brightness-level = <12>; + + /* resources used by the power sequences */ + pwms = <&pwm 2 5000000>; + pwm-names = "backlight"; + power-supply = <&vdd_bl_reg>; + + power-sequences { + power-on { + step0 { + type = "regulator"; + id = "power"; + enable; + }; + step1 { + type = "delay"; + delay_us = <10000>; + }; + step2 { + type = "pwm"; + id = "backlight"; + enable; + }; + step3 { + type = "gpio"; + number = <&gpio 28 0>; + enable; + }; + }; + + power-off { + step0 { + type = "gpio"; + number = <&gpio 28 0>; + disable; + }; + step1 { + type = "pwm"; + id = "backlight"; + disable; + }; + step2 { + type = "delay"; + delay_us = <10000>; + }; + step3 { + type = "regulator"; + id = "power"; + disable; + }; + }; + }; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; @@ -510,7 +567,7 @@ enable-active-high; }; - regulator@4 { + vdd_bl_reg: regulator@4 { compatible = "regulator-fixed"; reg = <4>; regulator-name = "vdd_bl";