From patchwork Wed Sep 5 08:25:54 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 1406191 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 6D77040B02 for ; Wed, 5 Sep 2012 08:27:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751059Ab2IEI0p (ORCPT ); Wed, 5 Sep 2012 04:26:45 -0400 Received: from na3sys009aog137.obsmtp.com ([74.125.149.18]:58428 "EHLO na3sys009aog137.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758188Ab2IEI0l (ORCPT ); Wed, 5 Sep 2012 04:26:41 -0400 Received: from mail-lb0-f174.google.com ([209.85.217.174]) (using TLSv1) by na3sys009aob137.postini.com ([74.125.148.12]) with SMTP ID DSNKUEcMwALVbik0LZyHXF3o2ScocQeS40r5@postini.com; Wed, 05 Sep 2012 01:26:41 PDT Received: by lbbgj3 with SMTP id gj3so189987lbb.19 for ; Wed, 05 Sep 2012 01:26:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=u7GdmK184bUrh1RpqXWS4kGi0pA4zLlo8N66K2YS5Zs=; b=nYmlqWFvuNAugLN+5xse86JWCfqCjUoNij4UVvnY5EZDHLE4Lr91LM25yIPkocT/GF NMvVNDaPbnMjWgg3/lFGIK1/ShSATuKDpst7Idwvi2YWxZc0YbxJ3oB6tU8GvzDxP8Jn Vyw5O7EzrAwiwn3xzMz+/1xiIbZRVtPHTURsxz68fffOfrC8tjGnQL1DBtJzTzYS77gM h90QHPLVhHBPyC9GfiYBZx9zd22tZOH4vPuPtXr6WfAPNeh1Q1rO4tUxzFDeuSO1ubwv bCFX2hsfY7TQss10I2og5TDyB8bdkMeQa1pYwEtiNw5K0DrC+cSfR8+rxJs6HZWRPgpe v9Nw== Received: by 10.152.162.10 with SMTP id xw10mr19112721lab.12.1346833599223; Wed, 05 Sep 2012 01:26:39 -0700 (PDT) Received: from localhost.localdomain (a91-156-160-115.elisa-laajakaista.fi. [91.156.160.115]) by mx.google.com with ESMTPS id bc2sm279735lbb.3.2012.09.05.01.26.37 (version=SSLv3 cipher=OTHER); Wed, 05 Sep 2012 01:26:38 -0700 (PDT) From: Tomi Valkeinen To: linux-omap@vger.kernel.org, linux-fbdev@vger.kernel.org, archit@ti.com Cc: Tomi Valkeinen Subject: [PATCH 16/17] OMAPDSS: Improve fifo management code Date: Wed, 5 Sep 2012 11:25:54 +0300 Message-Id: <1346833555-31258-17-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1346833555-31258-1-git-send-email-tomi.valkeinen@ti.com> References: <1346833555-31258-1-git-send-email-tomi.valkeinen@ti.com> X-Gm-Message-State: ALoCoQntnZ/nUeoAq+6nq9lo3i36t04nPnNTU+tGpZHhlwt/JNb4j+JwWbGy8X5vALYIhDURPptk Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org OMAP4+ allows assigning the overlay FIFOs freely, but that is not supported by omapdss yet. This patch takes a step forward by improving the fifo management to be more flexible. dispc.c is changed to keep track of the sizes of each fifo, and also the overlay using each fifo. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dispc.c | 39 +++++++++++++++++++++++++++++++-------- 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index e934abb..dc0f372 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -94,8 +94,11 @@ struct dispc_features { u16 pos_x, unsigned long *core_clk); unsigned long (*calc_core_clk) (enum omap_channel channel, u16 width, u16 height, u16 out_width, u16 out_height); + u8 num_fifos; }; +#define DISPC_MAX_NR_FIFOS 5 + static struct { struct platform_device *pdev; void __iomem *base; @@ -105,7 +108,9 @@ static struct { int irq; struct clk *dss_clk; - u32 fifo_size[MAX_DSS_OVERLAYS]; + u32 fifo_size[DISPC_MAX_NR_FIFOS]; + /* maps which plane is using a fifo. fifo-id -> plane-id */ + int fifo_assignment[DISPC_MAX_NR_FIFOS]; spinlock_t irq_lock; u32 irq_error_mask; @@ -1061,10 +1066,10 @@ static void dispc_mgr_set_size(enum omap_channel channel, u16 width, dispc_write_reg(DISPC_SIZE_MGR(channel), val); } -static void dispc_read_plane_fifo_sizes(void) +static void dispc_init_fifos(void) { u32 size; - int plane; + int fifo; u8 start, end; u32 unit; @@ -1072,16 +1077,30 @@ static void dispc_read_plane_fifo_sizes(void) dss_feat_get_reg_field(FEAT_REG_FIFOSIZE, &start, &end); - for (plane = 0; plane < dss_feat_get_num_ovls(); ++plane) { - size = REG_GET(DISPC_OVL_FIFO_SIZE_STATUS(plane), start, end); + for (fifo = 0; fifo < dispc.feat->num_fifos; ++fifo) { + size = REG_GET(DISPC_OVL_FIFO_SIZE_STATUS(fifo), start, end); size *= unit; - dispc.fifo_size[plane] = size; + dispc.fifo_size[fifo] = size; + + /* + * By default fifos are mapped directly to overlays, fifo 0 to + * ovl 0, fifo 1 to ovl 1, etc. + */ + dispc.fifo_assignment[fifo] = fifo; } } static u32 dispc_ovl_get_fifo_size(enum omap_plane plane) { - return dispc.fifo_size[plane]; + int fifo; + u32 size = 0; + + for (fifo = 0; fifo < dispc.feat->num_fifos; ++fifo) { + if (dispc.fifo_assignment[fifo] == plane) + size += dispc.fifo_size[fifo]; + } + + return size; } void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high) @@ -3708,7 +3727,7 @@ static void _omap_dispc_initial_config(void) dispc_set_loadmode(OMAP_DSS_LOAD_FRAME_ONLY); - dispc_read_plane_fifo_sizes(); + dispc_init_fifos(); dispc_configure_burst_sizes(); @@ -3724,6 +3743,7 @@ static const struct dispc_features omap24xx_dispc_feats __initconst = { .hp_max = 256, .calc_scaling = dispc_ovl_calc_scaling_24xx, .calc_core_clk = calc_core_clk_24xx, + .num_fifos = 3, }; static const struct dispc_features omap34xx_rev1_0_dispc_feats __initconst = { @@ -3735,6 +3755,7 @@ static const struct dispc_features omap34xx_rev1_0_dispc_feats __initconst = { .hp_max = 256, .calc_scaling = dispc_ovl_calc_scaling_34xx, .calc_core_clk = calc_core_clk_34xx, + .num_fifos = 3, }; static const struct dispc_features omap34xx_rev3_0_dispc_feats __initconst = { @@ -3746,6 +3767,7 @@ static const struct dispc_features omap34xx_rev3_0_dispc_feats __initconst = { .hp_max = 4096, .calc_scaling = dispc_ovl_calc_scaling_34xx, .calc_core_clk = calc_core_clk_34xx, + .num_fifos = 3, }; static const struct dispc_features omap44xx_dispc_feats __initconst = { @@ -3757,6 +3779,7 @@ static const struct dispc_features omap44xx_dispc_feats __initconst = { .hp_max = 4096, .calc_scaling = dispc_ovl_calc_scaling_44xx, .calc_core_clk = calc_core_clk_44xx, + .num_fifos = 5, }; static int __init dispc_init_features(struct device *dev)