From patchwork Mon Nov 18 12:39:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 3196331 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8E4A3C045B for ; Mon, 18 Nov 2013 12:39:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6DB8E205DE for ; Mon, 18 Nov 2013 12:39:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 59082205B9 for ; Mon, 18 Nov 2013 12:39:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751724Ab3KRMj1 (ORCPT ); Mon, 18 Nov 2013 07:39:27 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:53879 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751674Ab3KRMj0 (ORCPT ); Mon, 18 Nov 2013 07:39:26 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id rAICdPC0032550; Mon, 18 Nov 2013 06:39:25 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAICdPSJ029877; Mon, 18 Nov 2013 06:39:25 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.2.342.3; Mon, 18 Nov 2013 06:39:25 -0600 Received: from deskari.tieu.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAICdEWm010042; Mon, 18 Nov 2013 06:39:24 -0600 From: Tomi Valkeinen To: , CC: Archit Taneja , Tomi Valkeinen Subject: [PATCH 7/7] OMAPDSS: add dedicated fck PLL support Date: Mon, 18 Nov 2013 14:39:04 +0200 Message-ID: <1384778344-8226-8-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1384778344-8226-1-git-send-email-tomi.valkeinen@ti.com> References: <1384778344-8226-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for SoCs that have a dedicated DSS PLL used for DSS function clock. If there is no dss parent clock defined, it is presumed that the functionl clock rate can be set (almost) freely. The code calculates the highest allowed fck rate, which when divided with some integer gives the required pck. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dss.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 08c58eb..9a145da 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -446,12 +446,20 @@ bool dss_div_calc(unsigned long pck, unsigned long fck_min, unsigned long prate; unsigned m; + fck_hw_max = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK); + if (dss.parent_clk == NULL) { - fck = clk_get_rate(dss.dss_clk); + unsigned pckd; + + pckd = fck_hw_max / pck; + + fck = pck * pckd; + + fck = clk_round_rate(dss.dss_clk, fck); + return func(fck, data); } - fck_hw_max = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK); fckd_hw_max = dss.feat->fck_div_max; m = dss.feat->dss_fck_multiplier; @@ -503,16 +511,17 @@ static int dss_setup_default_clock(void) unsigned fck_div; int r; - if (dss.parent_clk == NULL) - return 0; - max_dss_fck = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK); - prate = clk_get_rate(dss.parent_clk); + if (dss.parent_clk == NULL) { + fck = clk_round_rate(dss.dss_clk, max_dss_fck); + } else { + prate = clk_get_rate(dss.parent_clk); - fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier, - max_dss_fck); - fck = prate / fck_div * dss.feat->dss_fck_multiplier; + fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier, + max_dss_fck); + fck = prate / fck_div * dss.feat->dss_fck_multiplier; + } r = dss_set_fck_rate(fck); if (r)