From patchwork Mon Nov 18 12:50:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 3196451 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8A324C045C for ; Mon, 18 Nov 2013 12:50:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5FA6D2061C for ; Mon, 18 Nov 2013 12:50:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 19E1C20620 for ; Mon, 18 Nov 2013 12:50:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751461Ab3KRMuR (ORCPT ); Mon, 18 Nov 2013 07:50:17 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:54187 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751409Ab3KRMuQ (ORCPT ); Mon, 18 Nov 2013 07:50:16 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id rAICoFcA000777; Mon, 18 Nov 2013 06:50:15 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAICoF94014755; Mon, 18 Nov 2013 06:50:15 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Mon, 18 Nov 2013 06:50:15 -0600 Received: from deskari.tieu.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAICoCV5002852; Mon, 18 Nov 2013 06:50:14 -0600 From: Tomi Valkeinen To: , CC: Archit Taneja , Tomi Valkeinen Subject: [PATCH 1/6] OMAPDSS: APPLY: set infos to dirty on enable Date: Mon, 18 Nov 2013 14:50:04 +0200 Message-ID: <1384779009-10512-2-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1384779009-10512-1-git-send-email-tomi.valkeinen@ti.com> References: <1384779009-10512-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently when DISPC is suspended, the driver stores all DISPC registers to memory, so that they can be restored on resume. This is a bad way to handle suspend/resume, as it's prone to failures and requires somewhat large amount of extra space to store the registers. A better approach is to program the DISPC from scratch when resuming. This can be easily accomplished in apply layer by setting the manager and overlay infos to dirty when the manager is to be enabled. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/apply.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/video/omap2/dss/apply.c b/drivers/video/omap2/dss/apply.c index 60758db..6ab4cb6 100644 --- a/drivers/video/omap2/dss/apply.c +++ b/drivers/video/omap2/dss/apply.c @@ -1072,6 +1072,7 @@ static void dss_setup_fifos(void) static int dss_mgr_enable_compat(struct omap_overlay_manager *mgr) { struct mgr_priv_data *mp = get_mgr_priv(mgr); + struct omap_overlay *ovl; unsigned long flags; int r; @@ -1091,6 +1092,27 @@ static int dss_mgr_enable_compat(struct omap_overlay_manager *mgr) goto err; } + /* + * Mark the info & extra_info dirty for the manager and its enabled + * overlays to force register writes. This ensures that the relevant + * registers are set after DSS has been off and the registers have been + * reset. + */ + + mp->info_dirty = true; + mp->extra_info_dirty = true; + + list_for_each_entry(ovl, &mgr->overlays, list) { + struct ovl_priv_data *op = get_ovl_priv(ovl); + + if (!op->enabled) + continue; + + op->info_dirty = true; + op->extra_info_dirty = true; + dispc_ovl_set_channel_out(ovl->id, mgr->id); + } + dss_setup_fifos(); dss_write_regs();