From patchwork Tue Jan 21 10:56:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 3516931 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 908DD9F2E9 for ; Tue, 21 Jan 2014 11:01:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ED34820148 for ; Tue, 21 Jan 2014 11:01:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 349A02015A for ; Tue, 21 Jan 2014 11:01:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754550AbaAULA5 (ORCPT ); Tue, 21 Jan 2014 06:00:57 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:39144 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754542AbaAULAw (ORCPT ); Tue, 21 Jan 2014 06:00:52 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s0LB0AI1000777; Tue, 21 Jan 2014 05:00:10 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s0LB0AH6013796; Tue, 21 Jan 2014 05:00:10 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Tue, 21 Jan 2014 05:00:10 -0600 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s0LAwGWA019193; Tue, 21 Jan 2014 05:00:06 -0600 From: Tomi Valkeinen To: , , , CC: Archit Taneja , Darren Etheridge , Tony Lindgren , Laurent Pinchart , Stefan Roese , Sebastian Reichel , Robert Nelson , "Dr . H . Nikolaus Schaller" , Marek Belisko , Sebastian Reichel , Javier Martinez Canillas , Enric Balletbo Serra , Florian Vaussard , Tomi Valkeinen Subject: [PATCHv3 26/41] ARM: omap4-sdp.dts: add display information Date: Tue, 21 Jan 2014 12:56:58 +0200 Message-ID: <1390301833-24944-27-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1390301833-24944-1-git-send-email-tomi.valkeinen@ti.com> References: <1390301833-24944-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add DT data for OMAP4 SDP board. The board has the following displays: lcd0: a command mode DSI panel connected to OMAP DSI1 encoder lcd1: a command mode DSI panel connected to OMAP DSI2 encoder hdmi: OMAP HDMI output with TPD12S015 ESD/level shifter Signed-off-by: Tomi Valkeinen --- arch/arm/boot/dts/omap4-sdp.dts | 107 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 105 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index dbc81fb6ef03..cf9f6cbbd349 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -19,6 +19,12 @@ reg = <0x80000000 0x40000000>; /* 1 GB */ }; + aliases { + display0 = &lcd0; + display1 = &lcd1; + display2 = &hdmi0; + }; + vdd_eth: fixedregulator-vdd-eth { compatible = "regulator-fixed"; regulator-name = "VDD_ETH"; @@ -153,6 +159,47 @@ startup-delay-us = <70000>; enable-active-high; }; + + tpd12s015: encoder@0 { + compatible = "ti,tpd12s015"; + + pinctrl-names = "default"; + pinctrl-0 = <&tpd12s015_pins>; + + gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */ + <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */ + <&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */ + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + tpd12s015_in: endpoint@0 { + remote-endpoint = <&hdmi_out>; + }; + }; + + port@1 { + reg = <1>; + + tpd12s015_out: endpoint@0 { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; + + hdmi0: connector@0 { + compatible = "hdmi-connector"; + label = "hdmi"; + + hdmi_connector_in: endpoint { + remote-endpoint = <&tpd12s015_out>; + }; + }; }; &omap4_pmx_core { @@ -163,8 +210,6 @@ &dmic_pins &mcbsp1_pins &mcbsp2_pins - &dss_hdmi_pins - &tpd12s015_pins >; uart2_pins: pinmux_uart2_pins { @@ -550,3 +595,61 @@ mode = <3>; power = <50>; }; + +&dss { + status = "ok"; +}; + +&dsi1 { + status = "ok"; + vdd-supply = <&vcxio>; + + dsi1_out_ep: endpoint { + remote-endpoint = <&lcd0_in>; + lanes = <0 1 2 3 4 5>; + }; + + lcd0: display { + compatible = "tpo,taal", "panel-dsi-cm"; + label = "lcd0"; + + gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102, reset */ + + lcd0_in: endpoint { + remote-endpoint = <&dsi1_out_ep>; + }; + }; +}; + +&dsi2 { + status = "ok"; + vdd-supply = <&vcxio>; + + dsi2_out_ep: endpoint { + remote-endpoint = <&lcd1_in>; + lanes = <0 1 2 3 4 5>; + }; + + lcd1: display { + compatible = "tpo,taal", "panel-dsi-cm"; + label = "lcd1"; + + gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104, reset */ + + lcd1_in: endpoint { + remote-endpoint = <&dsi2_out_ep>; + }; + }; +}; + +&hdmi { + status = "ok"; + vdda-supply = <&vdac>; + + pinctrl-names = "default"; + pinctrl-0 = <&dss_hdmi_pins>; + + hdmi_out: endpoint { + remote-endpoint = <&tpd12s015_in>; + }; +};