From patchwork Wed Nov 12 11:52:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 5288511 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0B1259F2ED for ; Wed, 12 Nov 2014 11:53:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4320D20120 for ; Wed, 12 Nov 2014 11:53:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 57DEA20176 for ; Wed, 12 Nov 2014 11:53:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752539AbaKLLxN (ORCPT ); Wed, 12 Nov 2014 06:53:13 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:38575 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752554AbaKLLxK (ORCPT ); Wed, 12 Nov 2014 06:53:10 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id sACBrAvP001845; Wed, 12 Nov 2014 05:53:10 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id sACBrA9d026754; Wed, 12 Nov 2014 05:53:10 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Wed, 12 Nov 2014 05:53:09 -0600 Received: from deskari.lan (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id sACBqgIE031206; Wed, 12 Nov 2014 05:53:08 -0600 From: Tomi Valkeinen To: , CC: Tomi Valkeinen Subject: [PATCH 17/22] OMAPDSS: HDMI: Remove HDMI PLL reset Date: Wed, 12 Nov 2014 13:52:19 +0200 Message-ID: <1415793144-11723-18-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.1.3 In-Reply-To: <1415793144-11723-1-git-send-email-tomi.valkeinen@ti.com> References: <1415793144-11723-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The SYSRESET bits in HDMI PLL do not reset the PLL itself, but only affect the power used for the PLL. Afaik there is no reason to use the SYSRESET bits, and we don't use it in the other PLLs, so let's remove the HDMI PLL reset to make the PLL code simpler and similar to other PLLs. Signed-off-by: Tomi Valkeinen --- drivers/video/fbdev/omap2/dss/hdmi_pll.c | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/drivers/video/fbdev/omap2/dss/hdmi_pll.c b/drivers/video/fbdev/omap2/dss/hdmi_pll.c index f04d435c4c0f..0942bdc8dfa6 100644 --- a/drivers/video/fbdev/omap2/dss/hdmi_pll.c +++ b/drivers/video/fbdev/omap2/dss/hdmi_pll.c @@ -166,21 +166,6 @@ static int hdmi_pll_config(struct hdmi_pll_data *pll) return 0; } -static int hdmi_pll_reset(struct hdmi_pll_data *pll) -{ - /* SYSRESET controlled by power FSM */ - REG_FLD_MOD(pll->base, PLLCTRL_PLL_CONTROL, pll_feat->sys_reset, 3, 3); - - /* READ 0x0 reset is in progress */ - if (hdmi_wait_for_bit_change(pll->base, PLLCTRL_PLL_STATUS, 0, 0, 1) - != 1) { - DSSERR("Failed to sysreset PLL\n"); - return -ETIMEDOUT; - } - - return 0; -} - int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) { u16 r = 0; @@ -193,10 +178,6 @@ int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) if (r) return r; - r = hdmi_pll_reset(pll); - if (r) - return r; - r = hdmi_pll_config(pll); if (r) return r;