From patchwork Tue Apr 21 20:51:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Luis R. Rodriguez" X-Patchwork-Id: 6253821 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B1FA59F1BE for ; Tue, 21 Apr 2015 20:51:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 272CB20340 for ; Tue, 21 Apr 2015 20:51:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6FF1620303 for ; Tue, 21 Apr 2015 20:51:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933054AbbDUUv0 (ORCPT ); Tue, 21 Apr 2015 16:51:26 -0400 Received: from mail-pd0-f173.google.com ([209.85.192.173]:36658 "EHLO mail-pd0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932413AbbDUUvZ (ORCPT ); Tue, 21 Apr 2015 16:51:25 -0400 Received: by pdea3 with SMTP id a3so252888847pde.3; Tue, 21 Apr 2015 13:51:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; bh=egYn21RzxSDh40/PmNVzanphZE5vzFScwJQXC35IHn8=; b=B5ueYfKw/uLb1//6PkK4ODJvvantqFPcOazm5gwsiCF+8XeSOhKiG2YcYyxPyVmXOx hTj7Z20rJY1BDfGwLqCxO3PI5qX94ZKoA6KKXKI56RkaD0upvvjC/25e8bYEMQBTTCm8 L7xfhlOrADDcusezsDwu2SfWUsx5o40StmIlB0JcBmbSRN5y3HeO4tOE36gd//pA/z6R /HJFKzIEl4LQWGaupvmy9QDO+9cOuDjEhuYozGuWjOKpe7jftxkW+ZSAiThccgWuKDI2 6mW153CtyEjthtDhDWvjIZmxCQVjDYfcmtL/3tv+InJhq8awn3b6XV1fdjME7Y3IysZH UieA== X-Received: by 10.66.156.198 with SMTP id wg6mr28733873pab.126.1429649484583; Tue, 21 Apr 2015 13:51:24 -0700 (PDT) Received: from mcgrof@gmail.com (c-98-234-145-61.hsd1.ca.comcast.net. [98.234.145.61]) by mx.google.com with ESMTPSA id bn4sm2973682pad.2.2015.04.21.13.51.21 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 21 Apr 2015 13:51:23 -0700 (PDT) Received: by mcgrof@gmail.com (sSMTP sendmail emulation); Tue, 21 Apr 2015 13:51:20 -0700 From: "Luis R. Rodriguez" To: mingo@elte.hu, tglx@linutronix.de, hpa@zytor.com Cc: plagnioj@jcrosoft.com, tomi.valkeinen@ti.com, linux-fbdev@vger.kernel.org, luto@amacapital.net, mst@redhat.com, "Luis R. Rodriguez" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Toshi Kani , Suresh Siddha , Juergen Gross , Daniel Vetter , Dave Airlie , Antonino Daplas , Dave Hansen , venkatesh.pallipadi@intel.com, Stefan Bader , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Mel Gorman , Vlastimil Babka , Borislav Petkov , Davidlohr Bueso , konrad.wilk@oracle.com, ville.syrjala@linux.intel.com, david.vrabel@citrix.com, jbeulich@suse.com, bhelgaas@google.com, linux-kernel@vger.kernel.org, xen-devel@lists.xensource.com Subject: [PATCH v3] x86: mtrr: generalize run time disabling of MTRR Date: Tue, 21 Apr 2015 13:51:15 -0700 Message-Id: <1429649475-18436-1-git-send-email-mcgrof@do-not-panic.com> X-Mailer: git-send-email 2.1.0 MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Luis R. Rodriguez" It is possible to enable CONFIG_MTRR and CONFIG_X86_PAT and end up with a system with MTRR functionality disabled and PAT functionality enabled. This can happen for instance when the Xen hypervisor is used where MTRR is not supported but PAT is. This can happen on Linux as of commit 47591df50 ("xen: Support Xen pv-domains using PAT") by Juergen, introduced as of v3.19. Technically we should assume the proper CPU bits would be set to disable MTRR but we can't always rely on this. At least on the Xen Hypervisor for instance only X86_FEATURE_MTRR was disabled as of Xen 4.4 through Xen commit 586ab6a [0], but not X86_FEATURE_K6_MTRR, X86_FEATURE_CENTAUR_MCR, or X86_FEATURE_CYRIX_ARR for instance. Roger Pau Monné has clarified though that although this is technically true we will never support PVH on these CPU types so Xen has no need to disable these bits on those systems. As per Roger AMD K6, Centaur and VIA chips don't have the necessary hardware extensions to allow running PVH guests [1]. As per Toshi it is also possible for the BIOS to disable MTRR support, in such cases get_mtrr_state() would update the MTRR state as per the BIOS, we need to propagate this information as well. x86 mtrr code relies on quite a bit of checks for mtrr_if being set to check to see if MTRR did get set up, instead of using that lets provide a generic setter which when set will let us know that MTRR is enabled. This also adds a few checks where they were not before which could potentially safeguard ourselves against incorrect usage of MTRR where this was not desirable. Where possible match error codes as if MTRR was disabled on arch/x86/include/asm/mtrr.h. Lastly, since disabling MTRR can happen at run time and we could end up with PAT enabled best record now on our logs when MTRR is disabled. [0] ~/devel/xen (git::stable-4.5)$ git describe --contains 586ab6a 4.4.0-rc1~18 [1] http://lists.xenproject.org/archives/html/xen-devel/2015-03/msg03460.html Cc: Roger Pau Monné Cc: Toshi Kani Cc: Andy Lutomirski Cc: Suresh Siddha Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Juergen Gross Cc: Daniel Vetter Cc: Dave Airlie Cc: Antonino Daplas Cc: Jean-Christophe Plagniol-Villard Cc: Tomi Valkeinen Cc: Dave Hansen Cc: venkatesh.pallipadi@intel.com Cc: Stefan Bader Cc: Ville Syrjälä Cc: Mel Gorman Cc: Vlastimil Babka Cc: Borislav Petkov Cc: Davidlohr Bueso Cc: konrad.wilk@oracle.com Cc: ville.syrjala@linux.intel.com Cc: david.vrabel@citrix.com Cc: jbeulich@suse.com Cc: toshi.kani@hp.com Cc: bhelgaas@google.com Cc: linux-fbdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: xen-devel@lists.xensource.com Signed-off-by: Luis R. Rodriguez --- arch/x86/kernel/cpu/mtrr/generic.c | 4 +++- arch/x86/kernel/cpu/mtrr/main.c | 36 ++++++++++++++++++++++++++---------- arch/x86/kernel/cpu/mtrr/mtrr.h | 2 +- 3 files changed, 30 insertions(+), 12 deletions(-) diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index a83f27a..8763fa7 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c @@ -438,7 +438,7 @@ static void __init print_mtrr_state(void) } /* Grab all of the MTRR state for this CPU into *state */ -void __init get_mtrr_state(void) +bool __init get_mtrr_state(void) { struct mtrr_var_range *vrs; unsigned long flags; @@ -482,6 +482,8 @@ void __init get_mtrr_state(void) post_set(); local_irq_restore(flags); + + return !!(mtrr_state.enabled & MTRR_STATE_MTRR_ENABLED); } /* Some BIOS's are messed up and don't set all MTRRs the same! */ diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c index d8c106c..bfef424 100644 --- a/arch/x86/kernel/cpu/mtrr/main.c +++ b/arch/x86/kernel/cpu/mtrr/main.c @@ -59,6 +59,7 @@ #define MTRR_TO_PHYS_WC_OFFSET 1000 u32 num_var_ranges; +int mtrr_enabled; unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES]; static DEFINE_MUTEX(mtrr_mutex); @@ -84,6 +85,9 @@ static int have_wrcomb(void) { struct pci_dev *dev; + if (!mtrr_enabled) + return 0; + dev = pci_get_class(PCI_CLASS_BRIDGE_HOST << 8, NULL); if (dev != NULL) { /* @@ -286,7 +290,7 @@ int mtrr_add_page(unsigned long base, unsigned long size, int i, replace, error; mtrr_type ltype; - if (!mtrr_if) + if (!mtrr_enabled) return -ENXIO; error = mtrr_if->validate_add_page(base, size, type); @@ -388,6 +392,8 @@ int mtrr_add_page(unsigned long base, unsigned long size, static int mtrr_check(unsigned long base, unsigned long size) { + if (!mtrr_enabled) + return -ENODEV; if ((base & (PAGE_SIZE - 1)) || (size & (PAGE_SIZE - 1))) { pr_warning("mtrr: size and base must be multiples of 4 kiB\n"); pr_debug("mtrr: size: 0x%lx base: 0x%lx\n", size, base); @@ -463,8 +469,8 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size) unsigned long lbase, lsize; int error = -EINVAL; - if (!mtrr_if) - return -ENXIO; + if (!mtrr_enabled) + return -ENODEV; max = num_var_ranges; /* No CPU hotplug when we change MTRR entries */ @@ -523,6 +529,8 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size) */ int mtrr_del(int reg, unsigned long base, unsigned long size) { + if (!mtrr_enabled) + return -ENODEV; if (mtrr_check(base, size)) return -EINVAL; return mtrr_del_page(reg, base >> PAGE_SHIFT, size >> PAGE_SHIFT); @@ -548,7 +556,7 @@ int arch_phys_wc_add(unsigned long base, unsigned long size) { int ret; - if (pat_enabled) + if (pat_enabled || !mtrr_enabled) return 0; /* Success! (We don't need to do anything.) */ ret = mtrr_add(base, size, MTRR_TYPE_WRCOMB, true); @@ -737,10 +745,12 @@ void __init mtrr_bp_init(void) } if (mtrr_if) { + mtrr_enabled = true; set_num_var_ranges(); init_table(); if (use_intel()) { - get_mtrr_state(); + /* BIOS may override */ + mtrr_enabled = get_mtrr_state(); if (mtrr_cleanup(phys_addr)) { changed_by_mtrr_cleanup = 1; @@ -748,11 +758,14 @@ void __init mtrr_bp_init(void) } } } + + if (!mtrr_enabled) + pr_info("mtrr: system does not support MTRR\n"); } void mtrr_ap_init(void) { - if (!use_intel() || mtrr_aps_delayed_init) + if (!use_intel() || mtrr_aps_delayed_init || !mtrr_enabled) return; /* * Ideally we should hold mtrr_mutex here to avoid mtrr entries @@ -777,6 +790,9 @@ void mtrr_save_state(void) { int first_cpu; + if (!mtrr_enabled) + return; + get_online_cpus(); first_cpu = cpumask_first(cpu_online_mask); smp_call_function_single(first_cpu, mtrr_save_fixed_ranges, NULL, 1); @@ -785,7 +801,7 @@ void mtrr_save_state(void) void set_mtrr_aps_delayed_init(void) { - if (!use_intel()) + if (!use_intel() || !mtrr_enabled) return; mtrr_aps_delayed_init = true; @@ -796,7 +812,7 @@ void set_mtrr_aps_delayed_init(void) */ void mtrr_aps_init(void) { - if (!use_intel()) + if (!use_intel() || !mtrr_enabled) return; /* @@ -813,7 +829,7 @@ void mtrr_aps_init(void) void mtrr_bp_restore(void) { - if (!use_intel()) + if (!use_intel() || !mtrr_enabled) return; mtrr_if->set_all(); @@ -821,7 +837,7 @@ void mtrr_bp_restore(void) static int __init mtrr_init_finialize(void) { - if (!mtrr_if) + if (!mtrr_enabled) return 0; if (use_intel()) { diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h index df5e41f..951884d 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.h +++ b/arch/x86/kernel/cpu/mtrr/mtrr.h @@ -51,7 +51,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt); void fill_mtrr_var_range(unsigned int index, u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi); -void get_mtrr_state(void); +bool get_mtrr_state(void); extern void set_mtrr_ops(const struct mtrr_ops *ops);