From patchwork Wed Jun 17 11:24:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudip Mukherjee X-Patchwork-Id: 6624341 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 66CBDC0020 for ; Wed, 17 Jun 2015 11:27:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5EBCB208E9 for ; Wed, 17 Jun 2015 11:27:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1D0EC208E3 for ; Wed, 17 Jun 2015 11:27:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756274AbbFQL10 (ORCPT ); Wed, 17 Jun 2015 07:27:26 -0400 Received: from mail-pd0-f180.google.com ([209.85.192.180]:34771 "EHLO mail-pd0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754426AbbFQLZk (ORCPT ); Wed, 17 Jun 2015 07:25:40 -0400 Received: by pdbki1 with SMTP id ki1so37687080pdb.1; Wed, 17 Jun 2015 04:25:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lgtVxmgvC1xyxiR3rnZ2pKhvMYGl70FjCSYtEImeXRI=; b=dpDpfAm+JxPfcmloXJ1FBwLbgbc1/4yQyyw3fAOxKp5qS7lk1qlNV8oyBnJ5Xpufn2 szw1G0LJ5pvVkdPwtCYSHa1VUireVg6FELJFWOwFLw+bi/8d5teAbBBqh9nCnn1SEbx0 csAb2PRV8oFXM+4vOuo2np0aA+VoPq5tviQuJsFcJWKvcGHtiMGwLvyCkYxXn87Qb+c5 tc3KqwHoEfUaiT/L81mHk6OT5KIIC1qLAwkAbbe72W6bTcn1yQAqrbHx98QA+Ay0sl4A kdPTUjPW3THyTmv/xGfsW4DO5mtfZNjh+PITln8MBdvTj05kRSo/YvqbnVswFW/Gju8m FnHA== X-Received: by 10.68.69.110 with SMTP id d14mr9912835pbu.96.1434540339528; Wed, 17 Jun 2015 04:25:39 -0700 (PDT) Received: from localhost.localdomain ([122.169.132.132]) by mx.google.com with ESMTPSA id zx1sm4367679pbb.73.2015.06.17.04.25.36 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 17 Jun 2015 04:25:38 -0700 (PDT) From: Sudip Mukherjee To: Greg Kroah-Hartman Cc: linux-fbdev@vger.kernel.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, Joe Perches , Sudip Mukherjee Subject: [PATCH v2 6/9] staging: sm7xxfb: reduce indention Date: Wed, 17 Jun 2015 16:54:45 +0530 Message-Id: <1434540288-8289-7-git-send-email-sudipm.mukherjee@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1434540288-8289-1-git-send-email-sudipm.mukherjee@gmail.com> References: <1434540288-8289-1-git-send-email-sudipm.mukherjee@gmail.com> Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_WEB, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP reduce code indention keeping the logic same. Signed-off-by: Sudip Mukherjee --- drivers/staging/sm7xxfb/sm7xxfb.c | 173 ++++++++++++++++++-------------------- 1 file changed, 82 insertions(+), 91 deletions(-) diff --git a/drivers/staging/sm7xxfb/sm7xxfb.c b/drivers/staging/sm7xxfb/sm7xxfb.c index 6bdcd5b..1e60d36 100644 --- a/drivers/staging/sm7xxfb/sm7xxfb.c +++ b/drivers/staging/sm7xxfb/sm7xxfb.c @@ -255,37 +255,33 @@ static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green, /* * 16/32 bit true-colour, use pseudo-palette for 16 base color */ - if (regno < 16) { - if (sfb->fb->var.bits_per_pixel == 16) { - u32 *pal = sfb->fb->pseudo_palette; - - val = chan_to_field(red, &sfb->fb->var.red); - val |= chan_to_field(green, - &sfb->fb->var.green); - val |= chan_to_field(blue, &sfb->fb->var.blue); + if (regno >= 16) + break; + if (sfb->fb->var.bits_per_pixel == 16) { + u32 *pal = sfb->fb->pseudo_palette; + + val = chan_to_field(red, &sfb->fb->var.red); + val |= chan_to_field(green, &sfb->fb->var.green); + val |= chan_to_field(blue, &sfb->fb->var.blue); #ifdef __BIG_ENDIAN - pal[regno] = - ((red & 0xf800) >> 8) | - ((green & 0xe000) >> 13) | - ((green & 0x1c00) << 3) | - ((blue & 0xf800) >> 3); + pal[regno] = ((red & 0xf800) >> 8) | + ((green & 0xe000) >> 13) | + ((green & 0x1c00) << 3) | + ((blue & 0xf800) >> 3); #else - pal[regno] = val; + pal[regno] = val; #endif - } else { - u32 *pal = sfb->fb->pseudo_palette; + } else { + u32 *pal = sfb->fb->pseudo_palette; - val = chan_to_field(red, &sfb->fb->var.red); - val |= chan_to_field(green, - &sfb->fb->var.green); - val |= chan_to_field(blue, &sfb->fb->var.blue); + val = chan_to_field(red, &sfb->fb->var.red); + val |= chan_to_field(green, &sfb->fb->var.green); + val |= chan_to_field(blue, &sfb->fb->var.blue); #ifdef __BIG_ENDIAN - val = - (val & 0xff00ff00 >> 8) | - (val & 0x00ff00ff << 8); + val = (val & 0xff00ff00 >> 8) | + (val & 0x00ff00ff << 8); #endif - pal[regno] = val; - } + pal[regno] = val; } break; @@ -476,72 +472,67 @@ static void sm7xx_set_timing(struct smtcfb_info *sfb) sfb->width, sfb->height, sfb->fb->var.bits_per_pixel, sfb->hz); for (j = 0; j < ARRAY_SIZE(vgamode); j++) { - if (vgamode[j].mmsizex == sfb->width && - vgamode[j].mmsizey == sfb->height && - vgamode[j].bpp == sfb->fb->var.bits_per_pixel && - vgamode[j].hz == sfb->hz) { - dev_dbg(&sfb->pdev->dev, - "vgamode[j].mmsizex=%d vgamode[j].mmSizeY=%d vgamode[j].bpp=%d vgamode[j].hz=%d\n", - vgamode[j].mmsizex, vgamode[j].mmsizey, - vgamode[j].bpp, vgamode[j].hz); - - dev_dbg(&sfb->pdev->dev, "vgamode index=%d\n", j); - - smtc_mmiowb(0x0, 0x3c6); - - smtc_seqw(0, 0x1); - - smtc_mmiowb(vgamode[j].init_misc, 0x3c2); - - /* init SEQ register SR00 - SR04 */ - for (i = 0; i < SIZE_SR00_SR04; i++) - smtc_seqw(i, vgamode[j].init_sr00_sr04[i]); - - /* init SEQ register SR10 - SR24 */ - for (i = 0; i < SIZE_SR10_SR24; i++) - smtc_seqw(i + 0x10, - vgamode[j].init_sr10_sr24[i]); - - /* init SEQ register SR30 - SR75 */ - for (i = 0; i < SIZE_SR30_SR75; i++) - if ((i + 0x30) != 0x62 && - (i + 0x30) != 0x6a && - (i + 0x30) != 0x6b) - smtc_seqw(i + 0x30, - vgamode[j].init_sr30_sr75[i]); - - /* init SEQ register SR80 - SR93 */ - for (i = 0; i < SIZE_SR80_SR93; i++) - smtc_seqw(i + 0x80, - vgamode[j].init_sr80_sr93[i]); - - /* init SEQ register SRA0 - SRAF */ - for (i = 0; i < SIZE_SRA0_SRAF; i++) - smtc_seqw(i + 0xa0, - vgamode[j].init_sra0_sraf[i]); - - /* init Graphic register GR00 - GR08 */ - for (i = 0; i < SIZE_GR00_GR08; i++) - smtc_grphw(i, vgamode[j].init_gr00_gr08[i]); - - /* init Attribute register AR00 - AR14 */ - for (i = 0; i < SIZE_AR00_AR14; i++) - smtc_attrw(i, vgamode[j].init_ar00_ar14[i]); - - /* init CRTC register CR00 - CR18 */ - for (i = 0; i < SIZE_CR00_CR18; i++) - smtc_crtcw(i, vgamode[j].init_cr00_cr18[i]); - - /* init CRTC register CR30 - CR4D */ - for (i = 0; i < SIZE_CR30_CR4D; i++) - smtc_crtcw(i + 0x30, - vgamode[j].init_cr30_cr4d[i]); - - /* init CRTC register CR90 - CRA7 */ - for (i = 0; i < SIZE_CR90_CRA7; i++) - smtc_crtcw(i + 0x90, - vgamode[j].init_cr90_cra7[i]); - } + if (vgamode[j].mmsizex != sfb->width || + vgamode[j].mmsizey != sfb->height || + vgamode[j].bpp != sfb->fb->var.bits_per_pixel || + vgamode[j].hz != sfb->hz) + continue; + + dev_dbg(&sfb->pdev->dev, + "vgamode[j].mmsizex=%d vgamode[j].mmSizeY=%d vgamode[j].bpp=%d vgamode[j].hz=%d\n", + vgamode[j].mmsizex, vgamode[j].mmsizey, + vgamode[j].bpp, vgamode[j].hz); + + dev_dbg(&sfb->pdev->dev, "vgamode index=%d\n", j); + + smtc_mmiowb(0x0, 0x3c6); + + smtc_seqw(0, 0x1); + + smtc_mmiowb(vgamode[j].init_misc, 0x3c2); + + /* init SEQ register SR00 - SR04 */ + for (i = 0; i < SIZE_SR00_SR04; i++) + smtc_seqw(i, vgamode[j].init_sr00_sr04[i]); + + /* init SEQ register SR10 - SR24 */ + for (i = 0; i < SIZE_SR10_SR24; i++) + smtc_seqw(i + 0x10, vgamode[j].init_sr10_sr24[i]); + + /* init SEQ register SR30 - SR75 */ + for (i = 0; i < SIZE_SR30_SR75; i++) + if ((i + 0x30) != 0x62 && (i + 0x30) != 0x6a && + (i + 0x30) != 0x6b) + smtc_seqw(i + 0x30, + vgamode[j].init_sr30_sr75[i]); + + /* init SEQ register SR80 - SR93 */ + for (i = 0; i < SIZE_SR80_SR93; i++) + smtc_seqw(i + 0x80, vgamode[j].init_sr80_sr93[i]); + + /* init SEQ register SRA0 - SRAF */ + for (i = 0; i < SIZE_SRA0_SRAF; i++) + smtc_seqw(i + 0xa0, vgamode[j].init_sra0_sraf[i]); + + /* init Graphic register GR00 - GR08 */ + for (i = 0; i < SIZE_GR00_GR08; i++) + smtc_grphw(i, vgamode[j].init_gr00_gr08[i]); + + /* init Attribute register AR00 - AR14 */ + for (i = 0; i < SIZE_AR00_AR14; i++) + smtc_attrw(i, vgamode[j].init_ar00_ar14[i]); + + /* init CRTC register CR00 - CR18 */ + for (i = 0; i < SIZE_CR00_CR18; i++) + smtc_crtcw(i, vgamode[j].init_cr00_cr18[i]); + + /* init CRTC register CR30 - CR4D */ + for (i = 0; i < SIZE_CR30_CR4D; i++) + smtc_crtcw(i + 0x30, vgamode[j].init_cr30_cr4d[i]); + + /* init CRTC register CR90 - CRA7 */ + for (i = 0; i < SIZE_CR90_CRA7; i++) + smtc_crtcw(i + 0x90, vgamode[j].init_cr90_cra7[i]); } smtc_mmiowb(0x67, 0x3c2);