| Message ID | 20211124150757.17929-4-noralf@tronnes.org (mailing list archive) |
|---|---|
| State | Awaiting Upstream |
| Headers | show |
| Series | drm/tiny/st7735r: Match up with staging/fbtft driver | expand |
On Wed, 24 Nov 2021 16:07:54 +0100, Noralf Trønnes wrote: > The datasheet lists the minimum Serial clock cycle (Write) as 66ns which is > 15MHz. Mostly it can do much better than that and is in fact often run at > 32MHz. With a clever driver that runs configuration commands at a low speed > and only the pixel data at the maximum speed the configuration can't be > messed up by transfer errors and the speed is only limited by the amount of > pixel glitches that one is able to tolerate. > > Signed-off-by: Noralf Trønnes <noralf@tronnes.org> > --- > .../devicetree/bindings/display/sitronix,st7735r.yaml | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > Acked-by: Rob Herring <robh@kernel.org>
On 11/24/21 9:07 AM, Noralf Trønnes wrote: > The datasheet lists the minimum Serial clock cycle (Write) as 66ns which is Is this supposed to say "maximum" rather than "minimum"? > 15MHz. Mostly it can do much better than that and is in fact often run at > 32MHz. With a clever driver that runs configuration commands at a low speed > and only the pixel data at the maximum speed the configuration can't be > messed up by transfer errors and the speed is only limited by the amount of > pixel glitches that one is able to tolerate. > > Signed-off-by: Noralf Trønnes <noralf@tronnes.org> > --- Acked-by: David Lechner <david@lechnology.com>
Den 06.12.2021 16.19, skrev David Lechner: > On 11/24/21 9:07 AM, Noralf Trønnes wrote: >> The datasheet lists the minimum Serial clock cycle (Write) as 66ns >> which is > > Is this supposed to say "maximum" rather than "minimum"? > Minimum cycle time == maximum frequency. Noralf. >> 15MHz. Mostly it can do much better than that and is in fact often run at >> 32MHz. With a clever driver that runs configuration commands at a low >> speed >> and only the pixel data at the maximum speed the configuration can't be >> messed up by transfer errors and the speed is only limited by the >> amount of >> pixel glitches that one is able to tolerate. >> >> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> >> --- > Acked-by: David Lechner <david@lechnology.com>
diff --git a/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml b/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml index f81d0d0d51fe..157b1a7b18f9 100644 --- a/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml +++ b/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml @@ -32,15 +32,13 @@ properties: - okaya,rh128128t - const: sitronix,st7715r - spi-max-frequency: - maximum: 32000000 - dc-gpios: maxItems: 1 description: Display data/command selection (D/CX) backlight: true reg: true + spi-max-frequency: true reset-gpios: true rotation: true
The datasheet lists the minimum Serial clock cycle (Write) as 66ns which is 15MHz. Mostly it can do much better than that and is in fact often run at 32MHz. With a clever driver that runs configuration commands at a low speed and only the pixel data at the maximum speed the configuration can't be messed up by transfer errors and the speed is only limited by the amount of pixel glitches that one is able to tolerate. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> --- .../devicetree/bindings/display/sitronix,st7735r.yaml | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)