| Message ID | 20220327223927.20848-15-granquet@baylibre.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | drm/mediatek: Add mt8195 DisplayPort driver | expand |
On Mon, 2022-03-28 at 00:39 +0200, Guillaume Ranquet wrote: > Add flexibility by moving the csc_enable bit to SoC specific config > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 40254cd9d168..eb969c5c5c2e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -133,6 +133,7 @@ struct mtk_dpi_conf { > u32 hvsize_mask; > u32 channel_swap_shift; > u32 yuv422_en_bit; > + u32 csc_enable_bit; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -363,7 +364,8 @@ static void mtk_dpi_config_yuv422_enable(struct > mtk_dpi *dpi, bool enable) > > static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool > enable) > { > - mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, > CSC_ENABLE); > + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : > 0, > + dpi->conf->csc_enable_bit); > } > > static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool > enable) > @@ -827,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -843,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -858,6 +862,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -873,6 +878,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 40254cd9d168..eb969c5c5c2e 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -133,6 +133,7 @@ struct mtk_dpi_conf { u32 hvsize_mask; u32 channel_swap_shift; u32 yuv422_en_bit; + u32 csc_enable_bit; const struct mtk_dpi_yc_limit *limit; }; @@ -363,7 +364,8 @@ static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable) static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable) { - mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE); + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : 0, + dpi->conf->csc_enable_bit); } static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable) @@ -827,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf = { .hvsize_mask = HSIZE_MASK, .channel_swap_shift = CH_SWAP, .yuv422_en_bit = YUV422_EN, + .csc_enable_bit = CSC_ENABLE, .limit = &mtk_dpi_limit, }; @@ -843,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf = { .hvsize_mask = HSIZE_MASK, .channel_swap_shift = CH_SWAP, .yuv422_en_bit = YUV422_EN, + .csc_enable_bit = CSC_ENABLE, .limit = &mtk_dpi_limit, }; @@ -858,6 +862,7 @@ static const struct mtk_dpi_conf mt8183_conf = { .hvsize_mask = HSIZE_MASK, .channel_swap_shift = CH_SWAP, .yuv422_en_bit = YUV422_EN, + .csc_enable_bit = CSC_ENABLE, .limit = &mtk_dpi_limit, }; @@ -873,6 +878,7 @@ static const struct mtk_dpi_conf mt8192_conf = { .hvsize_mask = HSIZE_MASK, .channel_swap_shift = CH_SWAP, .yuv422_en_bit = YUV422_EN, + .csc_enable_bit = CSC_ENABLE, .limit = &mtk_dpi_limit, };