diff mbox

[v2,0/7] imx-drm: ipuv3-crtc: Implement mode_fixup

Message ID CAOMZO5AYKbq34j2VnZKWqSBVfJgoOOhZX+mPgnMwZ1mzBAKGJQ@mail.gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Fabio Estevam Jan. 23, 2015, 3:06 p.m. UTC 
On Fri, Jan 23, 2015 at 12:56 AM, Liu Ying <Ying.Liu@freescale.com> wrote:
> Hi,
>
> It looks that the below commit makes my Hannstar XGA LVDS panel stop working
> on the i.MX6DL SabreSD board.  Any idea?

Yes, with eb10d6355532def3a ("mx-drm: encoder prepare/mode_set must
use adjusted mode") applied
the DI clock is 0:
diff mbox

Patch

--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -169,6 +169,8 @@  static void imx_ldb_encoder_prepare(struct
drm_encoder *encoder)
        unsigned long di_clk = mode->clock * 1000;
        int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);

+       pr_err("********* DI clock is %ld\n", di_clk);
+
        if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {

With eb10d6355532def3a applied:

[    1.493745] ********* DI clock is 0

With eb10d6355532def3a reverted:

[    1.493639] ********* DI clock is 65000000

Should we just go back to the previous usage?

--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -163,12 +163,14 @@  static void imx_ldb_encoder_prepare(struct
drm_encoder *encoder)
 {
        struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
        struct imx_ldb *ldb = imx_ldb_ch->ldb;
-       struct drm_display_mode *mode = &encoder->crtc->hwmode;
+       struct drm_display_mode *mode = &encoder->crtc->mode;
        u32 pixel_fmt;
--
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