From patchwork Mon Sep 19 13:47:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Bornyakov X-Patchwork-Id: 12980476 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C89E2ECAAD3 for ; Mon, 19 Sep 2022 13:51:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229697AbiISNtc (ORCPT ); Mon, 19 Sep 2022 09:49:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229580AbiISNtb (ORCPT ); Mon, 19 Sep 2022 09:49:31 -0400 Received: from mail.pr-group.ru (mail.pr-group.ru [178.18.215.3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60B6F2FFD8; Mon, 19 Sep 2022 06:49:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=metrotek.ru; s=mail; h=from:subject:date:message-id:to:cc:mime-version:content-transfer-encoding; bh=phcN5G2W4NgGKL7zC1yzBaojnuY/jDS0EdSG5LS1Meg=; b=CsHXQnABNJgUQDJn3Rc7dqN2HVwj5DY6X5zUI77q6ecww67IJQWYbg1RM5lJEdbP2HtLI/QWhXJ8s 8jESZGeiFeHsWozJITGKbHl2jZUVt1uEZRc9fybolkvxzkwm/UgYXvebjf32fdasOV0xKiaAo8ICyW ezBd0ZKncNde7mSFLOrMb4sFRZZvwV5xpPEYF3hIrEQ3vael5uLyaSz/4Gmpn4TxrwheSThfMsM2IW eLcXvAD6+2jHcqeGyh1ZbFyDSlzzpot6xmLzxFdMGqXN5eBPLjkVnFutPLCealAfgBpL6X34sDnE4s fvhRB+umhi5vS5Dxipm8edviDDy41KQ== X-Kerio-Anti-Spam: Build: [Engines: 2.16.4.1445, Stamp: 3], Multi: [Enabled, t: (0.000010,0.021412)], BW: [Enabled, t: (0.000023,0.000001)], RTDA: [Enabled, t: (0.075608), Hit: No, Details: v2.41.0; Id: 15.52kb0k.1gdb055vp.7sk6; mclb], total: 0(700) X-Footer: bWV0cm90ZWsucnU= Received: from h-e2.ddg ([85.143.252.66]) (authenticated user i.bornyakov@metrotek.ru) by mail.pr-group.ru with ESMTPSA (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256 bits)); Mon, 19 Sep 2022 16:49:12 +0300 From: Ivan Bornyakov To: mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com, trix@redhat.com, dg@emlix.com, j.zink@pengutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: Ivan Bornyakov , linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, system@metrotek.ru Subject: [PATCH v12 0/2] Lattice sysCONFIG SPI FPGA manager Date: Mon, 19 Sep 2022 16:47:48 +0300 Message-Id: <20220919134750.25197-1-i.bornyakov@metrotek.ru> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org Add support to the FPGA manager for programming Lattice ECP5 FPGA over slave SPI sysCONFIG interface. ChangeLog: v1 -> v2: * remove "spi" from compatible string * reword description in dt-bindings doc * add reference to spi-peripheral-props.yaml in dt-binding doc * fix DTS example in dt-bindings doc: 4-spaces indentations, no undersores in node names. v2 -> v3: * fix typo "##size-cells" -> "#size-cells" in dt-bindings example v3 -> v4: * dt-bindings: reword description * dt-bindings: revert props order v4 -> v5: * dt-bindings: remove trailing dot from title * dt-bindings: reword description to avoid driver reference * dt-bindings: add "Reviewed-by: Krzysztof Kozlowski" tag v5 -> v6: * ecp5-spi: lock SPI bus for exclusive usage in ecp5_ops_write_init(), release in ecp5_ops_write_complete() or on error v6 -> v7: * ecp5-spi.c -> lattice-sysconfig-spi.c. Reworked to represent generalized sysCONFIG port with implementations for ECP5 and MachXO2 * lattice,ecp5-fpga-mgr.yaml -> lattice,sysconfig.yaml. Reworked to document both ECP5 and MachXO2 sysCONFIG. * dt-bindings: remove "Reviewed-by: Krzysztof Kozlowski" tag as doc was rewritten by a considerable amount. v7 -> v8: * dt-bindings: move "program-gpios", "init-gpios" and "done-gpios" to top-level properties and disallow them for MachXO2 variant. v8 -> v9: * dt-bindings: "program-gpios", "init-gpios" and "done-gpios" are now optional for both ECP5 and MachXO2 * lattice-sysconfig-spi.c -> sysconfig-spi.c + sysconfig.c + sysconfig.h ** reworked to be one sysCONFIG FPGA Manager rather than two distinct ECP5 and MachXO2 managers ** splitted to port type agnostic sysconfig.c and SPI-specific sysconfig-spi.c ** command transfer function moved to callback for ease of adding another port type, such as I2C v9 -> v10: * split sysconfig_transfer() callback into separate command_write() and command_write_then_read(). There are too many transfers without readback. * add command_write_with_data() callback which performs single transfer of command + data. It's needed for better abstraction of paged bitstream write routine. * move sysconfig_lsc_burst_init() to bitstream_burst_write_init() callback to break dependence of sysconfig.c from sysconfig-spi.c * move sysconfig_lsc_burst_complete() to bitstream_burst_write_complete() callback to break dependence of sysconfig.c from sysconfig-spi.c * add bitstream_burst_write() to abstract fpga_manager_ops->write() from bus type * remove struct spi_device from struct sysconfig_priv, use to_spi_device() * move fpga_manager_ops initialization to sysconfig.c v10 -> v11: * rename sysconfig_lsc_burst_init() to sysconfig_spi_lsc_burst_init() * rename sysconfig_bitstream_burst_write() to sysconfig_spi_bitstream_burst_write() * rename sysconfig_lsc_burst_complete() to sysconfig_spi_lsc_burst_complete() * rename "ecp5-fpga-mgr" to "sysconfig-ecp5" * rename "machxo2-fpga-mgr" to "sysconfig-machxo2" * move spi_max_speed_hz from struct sysconfig_fpga_priv to struct sysconfig_spi_fpga_priv, which is local to sysconfig-spi.c * remove SPI bus unlock on write error form sysconfig_spi_bitstream_burst_write(), call sysconfig_burst_write_complete() on error in sysconfig_bitstream_burst_write() instead. v11 -> v12: * build sysconfig core as separate module to prevent duplication of common code segments across different binaries * rename sysconfig.c to lattice-sysconfig.c * rename sysconfig.h to lattice-sysconfig.h * rename sysconfig-spi.c to lattice-sysconfig-spi.c * rename sysconfig_spi_cmd_write_then_read() to sysconfig_spi_cmd_read() * rename command_write_then_read() callback to command_read() * rename sysconfig_cmd_write_then_read() to sysconfig_cmd_read() * rename sysconfig_spi_lsc_burst_init() to sysconfig_spi_bitstream_burst_init() * rename sysconfig_spi_lsc_burst_complete() to sysconfig_spi_bitstream_burst_complete() * remove excessive !spi check from sysconfig_spi_cmd_write(), sysconfig_spi_cmd_read(), sysconfig_spi_bitstream_burst_init(), sysconfig_spi_bitstream_burst_write() and sysconfig_spi_bitstream_burst_complete() * drop MachXO2 support ** drop struct sysconfig_fpga_priv ** drop paged write ** drop command_write_with_data() and friends ** drop ISC_PROGRAM_DONE routine ** drop refresh from sysconfig_isc_finish() ** sysconfig_isc_erase() only erase SRAM ** drop MachXO2 mentions from DT bindings doc Ivan Bornyakov (2): fpga: lattice-sysconfig-spi: add Lattice sysCONFIG FPGA manager dt-bindings: fpga: document Lattice sysCONFIG FPGA manager .../bindings/fpga/lattice,sysconfig.yaml | 81 ++++ drivers/fpga/Kconfig | 11 + drivers/fpga/Makefile | 2 + drivers/fpga/lattice-sysconfig-spi.c | 153 +++++++ drivers/fpga/lattice-sysconfig.c | 408 ++++++++++++++++++ drivers/fpga/lattice-sysconfig.h | 40 ++ 6 files changed, 695 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml create mode 100644 drivers/fpga/lattice-sysconfig-spi.c create mode 100644 drivers/fpga/lattice-sysconfig.c create mode 100644 drivers/fpga/lattice-sysconfig.h