From patchwork Mon Feb 20 14:25:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anatolij Gustschin X-Patchwork-Id: 9582959 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A9D8A6042F for ; Mon, 20 Feb 2017 14:26:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A0BD28485 for ; Mon, 20 Feb 2017 14:26:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8D5C02850D; Mon, 20 Feb 2017 14:26:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8229728485 for ; Mon, 20 Feb 2017 14:26:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753413AbdBTO0K (ORCPT ); Mon, 20 Feb 2017 09:26:10 -0500 Received: from mail-out.m-online.net ([212.18.0.9]:42987 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753281AbdBTO0K (ORCPT ); Mon, 20 Feb 2017 09:26:10 -0500 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 3vRmBL1lTqz3hjxM; Mon, 20 Feb 2017 15:25:30 +0100 (CET) Received: from localhost (dynscan01.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 3vRmBK6kQ4zvkgy; Mon, 20 Feb 2017 15:25:29 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan01.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id bqlRsNsdhIAp; Mon, 20 Feb 2017 15:25:25 +0100 (CET) X-Auth-Info: h3DpWL7Nn18P8XVkpACfi9jRGrANMqPDGTYlmL4cIok= Received: from crub.agik.hopto.org (p4FCB4188.dip0.t-ipconnect.de [79.203.65.136]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Mon, 20 Feb 2017 15:25:25 +0100 (CET) From: Anatolij Gustschin To: linux-fpga@vger.kernel.org, devicetree@vger.kernel.org Cc: Alan Tull , Moritz Fischer , Rob Herring , Mark Rutland Subject: [PATCH v2 1/2] dt: bindings: fpga: add xilinx slave-serial binding description Date: Mon, 20 Feb 2017 15:25:23 +0100 Message-Id: <1487600724-17607-2-git-send-email-agust@denx.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487600724-17607-1-git-send-email-agust@denx.de> References: <1487600724-17607-1-git-send-email-agust@denx.de> Sender: linux-fpga-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add dt binding documentation details for Xilinx FPGA configuration over slave serial interface. Signed-off-by: Anatolij Gustschin Acked-by: Moritz Fischer --- Changes in v2: - correct gpios properties in example to match above description - use fpga-mgr@0 instead of fpga-spi@0 in example .../bindings/fpga/xilinx-slave-serial.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt diff --git a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt new file mode 100644 index 0000000..20b0731 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt @@ -0,0 +1,24 @@ +Xilinx Slave Serial SPI FPGA Manager + +Xilinx Spartan-6 FPGAs support a method of loading the bitstream over +what is referred to as "slave serial" interface. +The slave serial link is not technically SPI, and might require extra +circuits in order to play nicely with other SPI slaves on the same bus. + +See https://www.xilinx.com/support/documentation/user_guides/ug380.pdf + +Required properties: +- compatible: should contain "xlnx,fpga-slave-serial" +- reg: spi chip select of the FPGA +- prog_b-gpios: config pin (referred to as PROGRAM_B in the manual) +- done-gpios: config status pin (referred to as DONE in the manual) + +Example: + fpga_mgr_spi: fpga-mgr@0 { + compatible = "xlnx,fpga-slave-serial"; + spi-max-frequency = <60000000>; + spi-cpha; + reg = <0>; + done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + };