From patchwork Mon Feb 27 20:03:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Gerlach X-Patchwork-Id: 9593897 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8F63C60574 for ; Mon, 27 Feb 2017 20:06:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7FEDE28304 for ; Mon, 27 Feb 2017 20:06:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 74C5B2849E; Mon, 27 Feb 2017 20:06:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A80792832D for ; Mon, 27 Feb 2017 20:06:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751516AbdB0UGE (ORCPT ); Mon, 27 Feb 2017 15:06:04 -0500 Received: from mga02.intel.com ([134.134.136.20]:19798 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751387AbdB0UGC (ORCPT ); Mon, 27 Feb 2017 15:06:02 -0500 Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Feb 2017 12:03:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,215,1484035200"; d="scan'208";a="230311352" Received: from mgerlach-mobl.amr.corp.intel.com (HELO mgerlach-VirtualBox.amr.corp.intel.com) ([10.252.134.6]) by fmsmga004.fm.intel.com with ESMTP; 27 Feb 2017 12:03:50 -0800 From: matthew.gerlach@linux.intel.com To: atull@opensource.altera.com, moritz.fischer@ettus.com, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Matthew Gerlach , Matthew Gerlach Subject: [PATCH] fpga fr br: separate freeze bridge driver code Date: Mon, 27 Feb 2017 12:03:40 -0800 Message-Id: <1488225820-22822-1-git-send-email-matthew.gerlach@linux.intel.com> X-Mailer: git-send-email 2.7.4 Sender: linux-fpga-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Matthew Gerlach This patch separates the core Freeze Bridge driver code from the platform driver code. The intent is to allow the core driver code to be used without requiring platform driver support. Signed-off-by: Matthew Gerlach --- drivers/fpga/Kconfig | 7 ++++ drivers/fpga/Makefile | 1 + drivers/fpga/altera-freeze-bridge-plat.c | 65 ++++++++++++++++++++++++++++++++ drivers/fpga/altera-freeze-bridge.c | 41 ++++---------------- drivers/fpga/altera-freeze-bridge.h | 26 +++++++++++++ 5 files changed, 107 insertions(+), 33 deletions(-) create mode 100644 drivers/fpga/altera-freeze-bridge-plat.c create mode 100644 drivers/fpga/altera-freeze-bridge.h diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index ce861a2..1a1fc47 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -63,6 +63,13 @@ config ALTERA_FREEZE_BRIDGE isolate one region of the FPGA from the busses while that region is being reprogrammed. +config ALTERA_FREEZE_BRIDGE_PLAT + tristate "Platform support of Altera FPGA Freeze Bridge" + depends on ALTERA_FREEZE_BRIDGE && OF && HAS_IOMEM + help + Say Y to enable platform driver support for Altera FPGA + Freeze bridges. + endif # FPGA endmenu diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 8df07bc..a270c00 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o +obj-$(CONFIG_ALTERA_FREEZE_BRIDGE_PLAT) += altera-freeze-bridge-plat.o # High Level Interfaces obj-$(CONFIG_FPGA_REGION) += fpga-region.o diff --git a/drivers/fpga/altera-freeze-bridge-plat.c b/drivers/fpga/altera-freeze-bridge-plat.c new file mode 100644 index 0000000..44ce539 --- /dev/null +++ b/drivers/fpga/altera-freeze-bridge-plat.c @@ -0,0 +1,65 @@ +/* + * Platform Driver Support for FPGA Freeze Bridge Controller + * + * Copyright (C) 2016 Altera Corporation. All rights reserved. + * Copyright (C) 2016-2017 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ +#include "altera-freeze-bridge.h" +#include +#include +#include +#include + +static int altera_freeze_br_platform_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = pdev->dev.of_node; + struct resource *res; + void __iomem *reg_base; + + if (!np) + return -ENODEV; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + reg_base = devm_ioremap_resource(dev, res); + + if (IS_ERR(reg_base)) + return PTR_ERR(reg_base); + + return altera_freeze_br_probe(dev, reg_base); +} + +static int altera_freeze_br_platform_remove(struct platform_device *pdev) +{ + return altera_freeze_br_remove(&pdev->dev); +} + +static const struct of_device_id altera_freeze_br_of_match[] = { + { .compatible = "altr,freeze-bridge-controller", }, + {}, +}; +MODULE_DEVICE_TABLE(of, altera_freeze_br_of_match); + +static struct platform_driver altera_freeze_br_driver = { + .probe = altera_freeze_br_platform_probe, + .remove = altera_freeze_br_platform_remove, + .driver = { + .name = "altera_freeze_br", + .of_match_table = of_match_ptr(altera_freeze_br_of_match), + }, +}; + +module_platform_driver(altera_freeze_br_driver); diff --git a/drivers/fpga/altera-freeze-bridge.c b/drivers/fpga/altera-freeze-bridge.c index 8dcd9fb..2942459 100644 --- a/drivers/fpga/altera-freeze-bridge.c +++ b/drivers/fpga/altera-freeze-bridge.c @@ -15,12 +15,12 @@ * You should have received a copy of the GNU General Public License along with * this program. If not, see . */ +#include "altera-freeze-bridge.h" #include +#include #include #include -#include #include -#include #define FREEZE_CSR_STATUS_OFFSET 0 #define FREEZE_CSR_CTRL_OFFSET 4 @@ -208,33 +208,17 @@ static struct fpga_bridge_ops altera_freeze_br_br_ops = { .enable_show = altera_freeze_br_enable_show, }; -static const struct of_device_id altera_freeze_br_of_match[] = { - { .compatible = "altr,freeze-bridge-controller", }, - {}, -}; -MODULE_DEVICE_TABLE(of, altera_freeze_br_of_match); - -static int altera_freeze_br_probe(struct platform_device *pdev) +int altera_freeze_br_probe(struct device *dev, void __iomem *reg_base) { - struct device *dev = &pdev->dev; - struct device_node *np = pdev->dev.of_node; struct altera_freeze_br_data *priv; - struct resource *res; u32 status, revision; - if (!np) - return -ENODEV; - priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; priv->dev = dev; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->base_addr = devm_ioremap_resource(dev, res); - if (IS_ERR(priv->base_addr)) - return PTR_ERR(priv->base_addr); + priv->base_addr = reg_base; status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET); if (status & FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE) @@ -249,24 +233,15 @@ static int altera_freeze_br_probe(struct platform_device *pdev) return fpga_bridge_register(dev, FREEZE_BRIDGE_NAME, &altera_freeze_br_br_ops, priv); } +EXPORT_SYMBOL_GPL(altera_freeze_br_probe); -static int altera_freeze_br_remove(struct platform_device *pdev) +int altera_freeze_br_remove(struct device *dev) { - fpga_bridge_unregister(&pdev->dev); + fpga_bridge_unregister(dev); return 0; } - -static struct platform_driver altera_freeze_br_driver = { - .probe = altera_freeze_br_probe, - .remove = altera_freeze_br_remove, - .driver = { - .name = "altera_freeze_br", - .of_match_table = of_match_ptr(altera_freeze_br_of_match), - }, -}; - -module_platform_driver(altera_freeze_br_driver); +EXPORT_SYMBOL_GPL(altera_freeze_br_remove); MODULE_DESCRIPTION("Altera Freeze Bridge"); MODULE_AUTHOR("Alan Tull "); diff --git a/drivers/fpga/altera-freeze-bridge.h b/drivers/fpga/altera-freeze-bridge.h new file mode 100644 index 0000000..7d36edf --- /dev/null +++ b/drivers/fpga/altera-freeze-bridge.h @@ -0,0 +1,26 @@ +/* + * FPGA Freeze Bridge Controller + * + * Copyright (C) 2016-2017 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#ifndef _ALT_FRZ_BR_H +#define _ALT_FRZ_BR_H +#include + +int altera_freeze_br_probe(struct device *dev, void __iomem *reg_base); +int altera_freeze_br_remove(struct device *dev); + +#endif /* _ALT_FRZ_BR_H */