From patchwork Tue Feb 28 16:40:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anatolij Gustschin X-Patchwork-Id: 9596275 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E550D600CB for ; Tue, 28 Feb 2017 16:41:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D610527F99 for ; Tue, 28 Feb 2017 16:41:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C8DFD284EF; Tue, 28 Feb 2017 16:41:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 546DD27F99 for ; Tue, 28 Feb 2017 16:41:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751495AbdB1QlB (ORCPT ); Tue, 28 Feb 2017 11:41:01 -0500 Received: from mail-out.m-online.net ([212.18.0.9]:37140 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751344AbdB1Qk3 (ORCPT ); Tue, 28 Feb 2017 11:40:29 -0500 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 3vXkpL4cjDz3hjyW; Tue, 28 Feb 2017 17:40:26 +0100 (CET) Received: from localhost (dynscan01.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 3vXkpL2Xh1zvkW2; Tue, 28 Feb 2017 17:40:26 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan01.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id 0XteT0zY20sC; Tue, 28 Feb 2017 17:40:24 +0100 (CET) X-Auth-Info: oI5n3LANhchEYQVSKW0vglJvdmsJyusjjuscz350qGw= Received: from crub.agik.hopto.org (p4FCB5523.dip0.t-ipconnect.de [79.203.85.35]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Tue, 28 Feb 2017 17:40:24 +0100 (CET) From: Anatolij Gustschin To: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Alan Tull , Moritz Fischer , Rob Herring , Mark Rutland Subject: [PATCH v4 1/2] dt: bindings: fpga: add xilinx slave-serial binding description Date: Tue, 28 Feb 2017 17:40:21 +0100 Message-Id: <1488300022-30150-2-git-send-email-agust@denx.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488300022-30150-1-git-send-email-agust@denx.de> References: <1488300022-30150-1-git-send-email-agust@denx.de> Sender: linux-fpga-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add dt binding documentation details for Xilinx FPGA configuration over slave serial interface. Signed-off-by: Anatolij Gustschin Acked-by: Moritz Fischer Acked-by: Rob Herring Acked-by: Michal Simek Acked-by: Alan Tull --- Changes in v4: - add Acked-by tags Changes in v3: - extend example to show the usage in SPI master node, connected to the fpga-region node Changes in v2: - correct gpios properties in example to match above description - use fpga-mgr@0 instead of fpga-spi@0 in example .../bindings/fpga/xilinx-slave-serial.txt | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt diff --git a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt new file mode 100644 index 0000000..9766f74 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt @@ -0,0 +1,44 @@ +Xilinx Slave Serial SPI FPGA Manager + +Xilinx Spartan-6 FPGAs support a method of loading the bitstream over +what is referred to as "slave serial" interface. +The slave serial link is not technically SPI, and might require extra +circuits in order to play nicely with other SPI slaves on the same bus. + +See https://www.xilinx.com/support/documentation/user_guides/ug380.pdf + +Required properties: +- compatible: should contain "xlnx,fpga-slave-serial" +- reg: spi chip select of the FPGA +- prog_b-gpios: config pin (referred to as PROGRAM_B in the manual) +- done-gpios: config status pin (referred to as DONE in the manual) + +Example for full FPGA configuration: + + fpga-region0 { + compatible = "fpga-region"; + fpga-mgr = <&fpga_mgr_spi>; + #address-cells = <0x1>; + #size-cells = <0x1>; + }; + + spi1: spi@10680 { + compatible = "marvell,armada-xp-spi", "marvell,orion-spi"; + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + interrupts = <92>; + clocks = <&coreclk 0>; + status = "okay"; + + fpga_mgr_spi: fpga-mgr@0 { + compatible = "xlnx,fpga-slave-serial"; + spi-max-frequency = <60000000>; + spi-cpha; + reg = <0>; + done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + }; + };