From patchwork Thu Mar 30 12:08:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wu, Hao" X-Patchwork-Id: 9654057 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 761106034C for ; Thu, 30 Mar 2017 12:17:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 635032858C for ; Thu, 30 Mar 2017 12:17:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 559C728591; Thu, 30 Mar 2017 12:17:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8CBF12858C for ; Thu, 30 Mar 2017 12:17:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933493AbdC3MRG (ORCPT ); Thu, 30 Mar 2017 08:17:06 -0400 Received: from mga11.intel.com ([192.55.52.93]:10058 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932823AbdC3MQM (ORCPT ); Thu, 30 Mar 2017 08:16:12 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1490876171; x=1522412171; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=Z5o6FqdajJZvErfbUgEvxdNRcTK7DhowT/C1kcbc+HI=; b=tEEXZWGJP2xX1LgAuxg0cf7mCwPjPpFnex1iIxQRMDYBisfMuHF1ruQd +Qhv876p+7p1CXVD7mCRZ7OLo382rw==; Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Mar 2017 05:16:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,246,1486454400"; d="scan'208";a="840018360" Received: from hao-dev.bj.intel.com ([10.238.157.61]) by FMSMGA003.fm.intel.com with ESMTP; 30 Mar 2017 05:16:06 -0700 From: Wu Hao To: atull@kernel.org, moritz.fischer@ettus.com, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: luwei.kang@intel.com, yi.z.zhang@intel.com, hao.wu@intel.com, Tim Whisonant , Enno Luebbers , Shiva Rao , Christopher Rauer , Xiao Guangrong Subject: [PATCH 13/16] fpga: intel: afu: add header sub feature support Date: Thu, 30 Mar 2017 20:08:13 +0800 Message-Id: <1490875696-15145-14-git-send-email-hao.wu@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490875696-15145-1-git-send-email-hao.wu@intel.com> References: <1490875696-15145-1-git-send-email-hao.wu@intel.com> Sender: linux-fpga-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The header register set is always present for the Port/AFU, it is mainly for capability, control and status of the ports that AFU connected to. This patch implements header sub feature support. Below user interfaces are created by this patch. Sysfs interface: * /sys/class/fpga///id Read-only. Port ID. Ioctl interface: * FPGA_PORT_RESET Reset the FPGA AFU Port. Signed-off-by: Tim Whisonant Signed-off-by: Enno Luebbers Signed-off-by: Shiva Rao Signed-off-by: Christopher Rauer Signed-off-by: Xiao Guangrong Signed-off-by: Wu Hao --- drivers/fpga/intel/afu-main.c | 44 ++++++++++++++++++++++++++++++++++++++++- include/uapi/linux/intel-fpga.h | 14 +++++++++++++ 2 files changed, 57 insertions(+), 1 deletion(-) diff --git a/drivers/fpga/intel/afu-main.c b/drivers/fpga/intel/afu-main.c index 1c2035b..7166d5c 100644 --- a/drivers/fpga/intel/afu-main.c +++ b/drivers/fpga/intel/afu-main.c @@ -20,25 +20,66 @@ #include #include +#include #include "feature-dev.h" +static ssize_t +id_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int id = fpga_port_id(to_platform_device(dev)); + + return scnprintf(buf, PAGE_SIZE, "%d\n", id); +} +static DEVICE_ATTR_RO(id); + +static const struct attribute *port_hdr_attrs[] = { + &dev_attr_id.attr, + NULL, +}; + static int port_hdr_init(struct platform_device *pdev, struct feature *feature) { dev_dbg(&pdev->dev, "PORT HDR Init.\n"); - return 0; + fpga_port_reset(pdev); + + return sysfs_create_files(&pdev->dev.kobj, port_hdr_attrs); } static void port_hdr_uinit(struct platform_device *pdev, struct feature *feature) { dev_dbg(&pdev->dev, "PORT HDR UInit.\n"); + + sysfs_remove_files(&pdev->dev.kobj, port_hdr_attrs); +} + +static long +port_hdr_ioctl(struct platform_device *pdev, struct feature *feature, + unsigned int cmd, unsigned long arg) +{ + long ret; + + switch (cmd) { + case FPGA_PORT_RESET: + if (!arg) + ret = fpga_port_reset(pdev); + else + ret = -EINVAL; + break; + default: + dev_dbg(&pdev->dev, "%x cmd not handled", cmd); + ret = -ENODEV; + } + + return ret; } struct feature_ops port_hdr_ops = { .init = port_hdr_init, .uinit = port_hdr_uinit, + .ioctl = port_hdr_ioctl, }; static struct feature_driver port_feature_drvs[] = { @@ -78,6 +119,7 @@ static int afu_release(struct inode *inode, struct file *filp) dev_dbg(&pdev->dev, "Device File Release\n"); + fpga_port_reset(pdev); feature_dev_use_end(pdata); return 0; } diff --git a/include/uapi/linux/intel-fpga.h b/include/uapi/linux/intel-fpga.h index 77658316..13b2e61 100644 --- a/include/uapi/linux/intel-fpga.h +++ b/include/uapi/linux/intel-fpga.h @@ -32,8 +32,11 @@ #define FPGA_MAGIC 0xB6 #define FPGA_BASE 0 +#define PORT_BASE 0x40 #define FME_BASE 0x80 +/* Common IOCTLs for both FME and AFU file descriptor */ + /** * FPGA_GET_API_VERSION - _IO(FPGA_MAGIC, FPGA_BASE + 0) * @@ -52,6 +55,17 @@ #define FPGA_CHECK_EXTENSION _IO(FPGA_MAGIC, FPGA_BASE + 1) +/* IOCTLs for AFU file descriptor */ + +/** + * FPGA_PORT_RESET - _IO(FPGA_MAGIC, PORT_BASE + 0) + * + * Reset the FPGA AFU Port. No parameters are supported. + * Return: 0 on success, -errno of failure + */ + +#define FPGA_PORT_RESET _IO(FPGA_MAGIC, PORT_BASE + 0) + /* IOCTLs for FME file descriptor */ /**