From patchwork Tue Sep 29 14:44:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 11806145 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 14DD86CB for ; Tue, 29 Sep 2020 14:40:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F090D20756 for ; Tue, 29 Sep 2020 14:40:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730976AbgI2OkF (ORCPT ); Tue, 29 Sep 2020 10:40:05 -0400 Received: from mx0a-00128a01.pphosted.com ([148.163.135.77]:37022 "EHLO mx0a-00128a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728446AbgI2OkE (ORCPT ); Tue, 29 Sep 2020 10:40:04 -0400 Received: from pps.filterd (m0167089.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 08TEbS0A004451; Tue, 29 Sep 2020 10:40:01 -0400 Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com with ESMTP id 33t2j4kegj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Sep 2020 10:40:01 -0400 Received: from SCSQMBX11.ad.analog.com (scsqmbx11.ad.analog.com [10.77.17.10]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 08TEdxGe041874 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=FAIL); Tue, 29 Sep 2020 10:40:00 -0400 Received: from SCSQMBX10.ad.analog.com (10.77.17.5) by SCSQMBX11.ad.analog.com (10.77.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Tue, 29 Sep 2020 07:39:52 -0700 Received: from zeus.spd.analog.com (10.66.68.11) by SCSQMBX10.ad.analog.com (10.77.17.5) with Microsoft SMTP Server id 15.1.1779.2 via Frontend Transport; Tue, 29 Sep 2020 07:39:51 -0700 Received: from localhost.localdomain ([10.48.65.12]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 08TEdkbu028450; Tue, 29 Sep 2020 10:39:54 -0400 From: Alexandru Ardelean To: , , CC: , , , , Dragos Bogdan , Alexandru Ardelean Subject: [PATCH v4 3/7] clk: axi-clkgen: add support for ZynqMP (UltraScale) Date: Tue, 29 Sep 2020 17:44:05 +0300 Message-ID: <20200929144417.89816-4-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200929144417.89816-1-alexandru.ardelean@analog.com> References: <20200929144417.89816-1-alexandru.ardelean@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-09-29_07:2020-09-29,2020-09-29 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 priorityscore=1501 phishscore=0 spamscore=0 malwarescore=0 bulkscore=0 clxscore=1015 mlxlogscore=577 mlxscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009290130 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Dragos Bogdan This IP core also works and is supported on the Xilinx ZynqMP (UltraScale) FPGA boards. This patch enables the driver to be available on these platforms as well. Signed-off-by: Dragos Bogdan Signed-off-by: Alexandru Ardelean --- drivers/clk/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index b41aaed9bd51..6d76591c0bc4 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -239,7 +239,7 @@ config CLK_TWL6040 config COMMON_CLK_AXI_CLKGEN tristate "AXI clkgen driver" - depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST + depends on ARCH_ZYNQ || ARCH_ZYNQMP || MICROBLAZE || COMPILE_TEST help Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx FPGAs. It is commonly used in Analog Devices' reference designs.