From patchwork Sat Nov 14 00:55:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russ Weight X-Patchwork-Id: 11905263 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3BFDC14C0 for ; Sat, 14 Nov 2020 00:56:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2D95C2225F for ; Sat, 14 Nov 2020 00:56:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726311AbgKNA4Z (ORCPT ); Fri, 13 Nov 2020 19:56:25 -0500 Received: from mga01.intel.com ([192.55.52.88]:6577 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726285AbgKNA4V (ORCPT ); Fri, 13 Nov 2020 19:56:21 -0500 IronPort-SDR: feze2Q5vVpkytPvnyyONHukNy/TBiL4YUAyf+ezxdwNyO6JnU4CXjPaokwcy5SdxFDfH/RFo4d JQFD7yvqcMpQ== X-IronPort-AV: E=McAfee;i="6000,8403,9804"; a="188575989" X-IronPort-AV: E=Sophos;i="5.77,477,1596524400"; d="scan'208";a="188575989" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2020 16:56:17 -0800 IronPort-SDR: FDHAdR5lVq8aNuUD/qmZNOoBdeSz/JakxqvGMElcET1NbCiUHfJGh85MwiHLSamFGul/6+79RU VPOF4H42p9Cg== X-IronPort-AV: E=Sophos;i="5.77,477,1596524400"; d="scan'208";a="399904259" Received: from rhweight-mobl2.amr.corp.intel.com (HELO rhweight-mobl2.ra.intel.com) ([10.209.134.21]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Nov 2020 16:56:15 -0800 From: Russ Weight To: mdf@kernel.org, lee.jones@linaro.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: trix@redhat.com, lgoncalv@redhat.com, yilun.xu@intel.com, hao.wu@intel.com, matthew.gerlach@intel.com, Russ Weight Subject: [PATCH v5 6/6] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func Date: Fri, 13 Nov 2020 16:55:59 -0800 Message-Id: <20201114005559.90860-7-russell.h.weight@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201114005559.90860-1-russell.h.weight@intel.com> References: <20201114005559.90860-1-russell.h.weight@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org Extend the MAX10 BMC Secure Update driver to include a function that returns 64 bits of additional HW specific data for errors that require additional information. This callback function enables the hw_errinfo sysfs node in the Intel Security Manager class driver. Signed-off-by: Russ Weight --- v5: - No change v4: - No change v3: - Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_ - Changed "MAX10 BMC Secure Engine driver" to "MAX10 BMC Secure Update driver" v2: - Implemented HW_ERRINFO_POISON for m10bmc_sec_hw_errinfo() to ensure that corresponding bits are set to 1 if we are unable to read the doorbell or auth_result registers. - Added m10bmc_ prefix to functions in m10bmc_iops structure --- drivers/fpga/intel-m10-bmc-secure.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/fpga/intel-m10-bmc-secure.c b/drivers/fpga/intel-m10-bmc-secure.c index 4fa8a2256088..a024efb173d3 100644 --- a/drivers/fpga/intel-m10-bmc-secure.c +++ b/drivers/fpga/intel-m10-bmc-secure.c @@ -472,11 +472,36 @@ static enum fpga_sec_err m10bmc_sec_cancel(struct fpga_sec_mgr *smgr) return ret ? FPGA_SEC_ERR_RW_ERROR : FPGA_SEC_ERR_NONE; } +#define HW_ERRINFO_POISON GENMASK(31, 0) +static u64 m10bmc_sec_hw_errinfo(struct fpga_sec_mgr *smgr) +{ + struct m10bmc_sec *sec = smgr->priv; + u32 doorbell, auth_result; + + switch (smgr->err_code) { + case FPGA_SEC_ERR_HW_ERROR: + case FPGA_SEC_ERR_TIMEOUT: + case FPGA_SEC_ERR_BUSY: + case FPGA_SEC_ERR_WEAROUT: + if (m10bmc_sys_read(sec->m10bmc, M10BMC_DOORBELL, &doorbell)) + doorbell = HW_ERRINFO_POISON; + + if (m10bmc_sys_read(sec->m10bmc, M10BMC_AUTH_RESULT, + &auth_result)) + auth_result = HW_ERRINFO_POISON; + + return (u64)doorbell << 32 | (u64)auth_result; + default: + return 0; + } +} + static const struct fpga_sec_mgr_ops m10bmc_sops = { .prepare = m10bmc_sec_prepare, .write_blk = m10bmc_sec_write_blk, .poll_complete = m10bmc_sec_poll_complete, .cancel = m10bmc_sec_cancel, + .get_hw_errinfo = m10bmc_sec_hw_errinfo, }; static int m10bmc_secure_probe(struct platform_device *pdev)