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Sun, 17 Jan 2021 18:49:22 -0800 Envelope-to: git@xilinx.com, michal.simek@xilinx.com, mdf@kernel.org, trix@redhat.com, robh+dt@kernel.org, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, chinnikishore369@gmail.com Received: from [10.140.6.60] (port=39926 helo=xhdnavam40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1l1KbY-0001PD-TM; Sun, 17 Jan 2021 18:49:21 -0800 From: Nava kishore Manne To: , , , , , , , CC: , , "Appana Durga Kedareswara rao" , Nava kishore Manne Subject: [PATCH 2/3] dt-bindings: fpga: Add binding doc for versal fpga manager Date: Mon, 18 Jan 2021 08:13:17 +0530 Message-ID: <20210118024318.9530-2-nava.manne@xilinx.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210118024318.9530-1-nava.manne@xilinx.com> References: <20210118024318.9530-1-nava.manne@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1552cab0-9ec4-4a4c-796f-08d8bb5bb2a3 X-MS-TrafficTypeDiagnostic: DM6PR02MB6348: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:2449; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2021 02:49:38.4991 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1552cab0-9ec4-4a4c-796f-08d8bb5bb2a3 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: BL2NAM02FT020.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB6348 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Appana Durga Kedareswara rao This patch adds binding doc for versal fpga manager driver. Signed-off-by: Nava kishore Manne Signed-off-by: Appana Durga Kedareswara rao --- .../bindings/fpga/xlnx,versal-fpga.yaml | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml diff --git a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml new file mode 100644 index 000000000000..cf3aa7917488 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/fpga/xilinx/xlnx,versal-fpga.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx versal-fpga driver. + +maintainers: + - Nava kishore Manne + +description: | +Device Tree versal-fpga bindings for the Versal SOC, Controlled +using Versal SoC firmware interface. + +properties: + compatible: + items: + - enum: + - xlnx,versal-fpga + +required: + - compatible + +Required properties: +- compatible: should contain "xlnx,versal-fpga" + +examples: + - | + versal_fpga: fpga { + compatible = "xlnx,versal-fpga"; + };