| Message ID | 20210126110826.24221-4-alexandru.ardelean@analog.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | clk: clk-axiclgen: add support for ZynqMP | expand |
diff --git a/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml b/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml index 0d06387184d6..983033fe5b17 100644 --- a/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml +++ b/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml @@ -20,6 +20,7 @@ properties: compatible: enum: - adi,axi-clkgen-2.00.a + - adi,zynqmp-axi-clkgen-2.00.a clocks: description:
The axi-clkgen driver now supports ZynqMP (UltraScale) as well, however the driver needs to use different PFD & VCO limits. For ZynqMP, these needs to be selected by using the 'adi,zynqmp-axi-clkgen-2.00.a' string. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> --- Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml | 1 + 1 file changed, 1 insertion(+)