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Wed, 17 Feb 2021 22:45:52 -0800 Envelope-to: maxz@xilinx.com, max.zhen@xilinx.com, michal.simek@xilinx.com, sonal.santan@xilinx.com, lizhih@xilinx.com, stefanos@xilinx.com, mdf@kernel.org, robh@kernel.org, trix@redhat.com, devicetree@vger.kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Received: from [172.19.72.212] (port=40190 helo=xsj-xw9400.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1lCd4S-0000mR-48; Wed, 17 Feb 2021 22:45:52 -0800 Received: by xsj-xw9400.xilinx.com (Postfix, from userid 21952) id 96C4760012E; Wed, 17 Feb 2021 22:41:06 -0800 (PST) From: Lizhi Hou To: CC: Lizhi Hou , , , , , , , , , , Max Zhen Subject: [PATCH V3 XRT Alveo 15/18] fpga: xrt: clock frequence counter platform driver Date: Wed, 17 Feb 2021 22:40:16 -0800 Message-ID: <20210218064019.29189-16-lizhih@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210218064019.29189-1-lizhih@xilinx.com> References: <20210218064019.29189-1-lizhih@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2b0e9a2b-9231-4ccc-6c47-08d8d3d8d615 X-MS-TrafficTypeDiagnostic: BYAPR02MB4005: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2021 06:45:52.9620 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2b0e9a2b-9231-4ccc-6c47-08d8d3d8d615 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: BL2NAM02FT036.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR02MB4005 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org Add clock frequence counter driver. Clock frequence counter is a hardware function discovered by walking xclbin metadata. A platform device node will be created for it. Other part of driver can read the actual clock frequence through clock frequence counter driver. Signed-off-by: Sonal Santan Signed-off-by: Max Zhen Signed-off-by: Lizhi Hou --- drivers/fpga/xrt/include/xleaf/clkfreq.h | 23 +++ drivers/fpga/xrt/lib/xleaf/clkfreq.c | 221 +++++++++++++++++++++++ 2 files changed, 244 insertions(+) create mode 100644 drivers/fpga/xrt/include/xleaf/clkfreq.h create mode 100644 drivers/fpga/xrt/lib/xleaf/clkfreq.c diff --git a/drivers/fpga/xrt/include/xleaf/clkfreq.h b/drivers/fpga/xrt/include/xleaf/clkfreq.h new file mode 100644 index 000000000000..29fc45e8a31b --- /dev/null +++ b/drivers/fpga/xrt/include/xleaf/clkfreq.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Header file for XRT Clock Counter Leaf Driver + * + * Copyright (C) 2020-2021 Xilinx, Inc. + * + * Authors: + * Lizhi Hou + */ + +#ifndef _XRT_CLKFREQ_H_ +#define _XRT_CLKFREQ_H_ + +#include "xleaf.h" + +/* + * CLKFREQ driver IOCTL calls. + */ +enum xrt_clkfreq_ioctl_cmd { + XRT_CLKFREQ_READ = XRT_XLEAF_CUSTOM_BASE, /* See comments in xleaf.h */ +}; + +#endif /* _XRT_CLKFREQ_H_ */ diff --git a/drivers/fpga/xrt/lib/xleaf/clkfreq.c b/drivers/fpga/xrt/lib/xleaf/clkfreq.c new file mode 100644 index 000000000000..2482dd2cff47 --- /dev/null +++ b/drivers/fpga/xrt/lib/xleaf/clkfreq.c @@ -0,0 +1,221 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Alveo FPGA Clock Frequency Counter Driver + * + * Copyright (C) 2020-2021 Xilinx, Inc. + * + * Authors: + * Lizhi Hou + */ + +#include +#include +#include +#include +#include +#include "metadata.h" +#include "xleaf.h" +#include "xleaf/clkfreq.h" + +#define CLKFREQ_ERR(clkfreq, fmt, arg...) \ + xrt_err((clkfreq)->pdev, fmt "\n", ##arg) +#define CLKFREQ_WARN(clkfreq, fmt, arg...) \ + xrt_warn((clkfreq)->pdev, fmt "\n", ##arg) +#define CLKFREQ_INFO(clkfreq, fmt, arg...) \ + xrt_info((clkfreq)->pdev, fmt "\n", ##arg) +#define CLKFREQ_DBG(clkfreq, fmt, arg...) \ + xrt_dbg((clkfreq)->pdev, fmt "\n", ##arg) + +#define XRT_CLKFREQ "xrt_clkfreq" + +#define OCL_CLKWIZ_STATUS_MASK 0xffff + +#define OCL_CLKWIZ_STATUS_MEASURE_START 0x1 +#define OCL_CLKWIZ_STATUS_MEASURE_DONE 0x2 +#define OCL_CLK_FREQ_COUNTER_OFFSET 0x8 +#define OCL_CLK_FREQ_V5_COUNTER_OFFSET 0x10 +#define OCL_CLK_FREQ_V5_CLK0_ENABLED 0x10000 + +struct clkfreq { + struct platform_device *pdev; + void __iomem *clkfreq_base; + const char *clkfreq_ep_name; + struct mutex clkfreq_lock; /* clock counter dev lock */ +}; + +static inline u32 reg_rd(struct clkfreq *clkfreq, u32 offset) +{ + return ioread32(clkfreq->clkfreq_base + offset); +} + +static inline void reg_wr(struct clkfreq *clkfreq, u32 val, u32 offset) +{ + iowrite32(val, clkfreq->clkfreq_base + offset); +} + +static u32 clkfreq_read(struct clkfreq *clkfreq) +{ + u32 freq = 0, status; + int times = 10; + + mutex_lock(&clkfreq->clkfreq_lock); + reg_wr(clkfreq, OCL_CLKWIZ_STATUS_MEASURE_START, 0); + while (times != 0) { + status = reg_rd(clkfreq, 0); + if ((status & OCL_CLKWIZ_STATUS_MASK) == + OCL_CLKWIZ_STATUS_MEASURE_DONE) + break; + mdelay(1); + times--; + }; + if (times > 0) { + freq = (status & OCL_CLK_FREQ_V5_CLK0_ENABLED) ? + reg_rd(clkfreq, OCL_CLK_FREQ_V5_COUNTER_OFFSET) : + reg_rd(clkfreq, OCL_CLK_FREQ_COUNTER_OFFSET); + } + mutex_unlock(&clkfreq->clkfreq_lock); + + return freq; +} + +static ssize_t freq_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct clkfreq *clkfreq = platform_get_drvdata(to_platform_device(dev)); + u32 freq; + ssize_t count; + + freq = clkfreq_read(clkfreq); + count = snprintf(buf, 64, "%d\n", freq); + + return count; +} +static DEVICE_ATTR_RO(freq); + +static struct attribute *clkfreq_attrs[] = { + &dev_attr_freq.attr, + NULL, +}; + +static struct attribute_group clkfreq_attr_group = { + .attrs = clkfreq_attrs, +}; + +static int +xrt_clkfreq_leaf_ioctl(struct platform_device *pdev, u32 cmd, void *arg) +{ + struct clkfreq *clkfreq; + int ret = 0; + + clkfreq = platform_get_drvdata(pdev); + + switch (cmd) { + case XRT_XLEAF_EVENT: + /* Does not handle any event. */ + break; + case XRT_CLKFREQ_READ: { + *(u32 *)arg = clkfreq_read(clkfreq); + break; + } + default: + xrt_err(pdev, "unsupported cmd %d", cmd); + return -EINVAL; + } + + return ret; +} + +static int clkfreq_remove(struct platform_device *pdev) +{ + struct clkfreq *clkfreq; + + clkfreq = platform_get_drvdata(pdev); + if (!clkfreq) { + xrt_err(pdev, "driver data is NULL"); + return -EINVAL; + } + + platform_set_drvdata(pdev, NULL); + devm_kfree(&pdev->dev, clkfreq); + + CLKFREQ_INFO(clkfreq, "successfully removed clkfreq subdev"); + return 0; +} + +static int clkfreq_probe(struct platform_device *pdev) +{ + struct clkfreq *clkfreq = NULL; + struct resource *res; + int ret; + + clkfreq = devm_kzalloc(&pdev->dev, sizeof(*clkfreq), GFP_KERNEL); + if (!clkfreq) + return -ENOMEM; + + platform_set_drvdata(pdev, clkfreq); + clkfreq->pdev = pdev; + mutex_init(&clkfreq->clkfreq_lock); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + clkfreq->clkfreq_base = ioremap(res->start, res->end - res->start + 1); + if (!clkfreq->clkfreq_base) { + CLKFREQ_ERR(clkfreq, "map base %pR failed", res); + ret = -EFAULT; + goto failed; + } + clkfreq->clkfreq_ep_name = res->name; + + ret = sysfs_create_group(&pdev->dev.kobj, &clkfreq_attr_group); + if (ret) { + CLKFREQ_ERR(clkfreq, "create clkfreq attrs failed: %d", ret); + goto failed; + } + + CLKFREQ_INFO(clkfreq, "successfully initialized clkfreq subdev"); + + return 0; + +failed: + clkfreq_remove(pdev); + return ret; +} + +static struct xrt_subdev_endpoints xrt_clkfreq_endpoints[] = { + { + .xse_names = (struct xrt_subdev_ep_names[]) { + { .regmap_name = "freq_cnt" }, + { NULL }, + }, + .xse_min_ep = 1, + }, + { 0 }, +}; + +static struct xrt_subdev_drvdata xrt_clkfreq_data = { + .xsd_dev_ops = { + .xsd_ioctl = xrt_clkfreq_leaf_ioctl, + }, +}; + +static const struct platform_device_id xrt_clkfreq_table[] = { + { XRT_CLKFREQ, (kernel_ulong_t)&xrt_clkfreq_data }, + { }, +}; + +static struct platform_driver xrt_clkfreq_driver = { + .driver = { + .name = XRT_CLKFREQ, + }, + .probe = clkfreq_probe, + .remove = clkfreq_remove, + .id_table = xrt_clkfreq_table, +}; + +void clkfreq_leaf_init_fini(bool init) +{ + if (init) { + xleaf_register_driver(XRT_SUBDEV_CLKFREQ, + &xrt_clkfreq_driver, xrt_clkfreq_endpoints); + } else { + xleaf_unregister_driver(XRT_SUBDEV_CLKFREQ); + } +}