| Message ID | 20210304070224.22346-3-nava.manne@xilinx.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add Bitstream configuration support for Versal | expand |
On Thu, Mar 04, 2021 at 12:32:23PM +0530, Nava kishore Manne wrote: > From: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> > > This patch adds binding doc for versal fpga manager driver. Why do you need a DT entry for this? Can't the Versal firmware driver instantiate the fpga-mgr device? > > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> > Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> > --- > Changes for v2: > -Fixed file format and syntax issues. > Changes for v3: > -Removed unwated extra spaces. > > .../bindings/fpga/xlnx,versal-fpga.yaml | 33 +++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml > > diff --git a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml > new file mode 100644 > index 000000000000..fec6144766fe > --- /dev/null > +++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml > @@ -0,0 +1,33 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/fpga/xlnx,versal-fpga.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Xilinx Versal FPGA driver. > + > +maintainers: > + - Nava kishore Manne <nava.manne@xilinx.com> > + > +description: | > + Device Tree Versal FPGA bindings for the Versal SoC, controlled > + using firmware interface. > + > +properties: > + compatible: > + items: > + - enum: > + - xlnx,versal-fpga > + > +required: > + - compatible > + > +additionalProperties: false > + > +examples: > + - | > + versal_fpga: fpga { > + compatible = "xlnx,versal-fpga"; > + }; > + > +... > -- > 2.18.0 >
Hi Rob, Thanks for providing the review comments. Please find my response inline. > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: Tuesday, March 9, 2021 1:50 AM > To: Nava kishore Manne <navam@xilinx.com> > Cc: mdf@kernel.org; trix@redhat.com; Michal Simek <michals@xilinx.com>; > gregkh@linuxfoundation.org; Jolly Shah <JOLLYS@xilinx.com>; Rajan Vaja > <RAJANV@xilinx.com>; arnd@arndb.de; Manish Narani > <MNARANI@xilinx.com>; Amit Sunil Dhamne <amitsuni@xilinx.com>; Tejas > Patel <tejasp@xlnx.xilinx.com>; linux-fpga@vger.kernel.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; chinnikishore369@gmail.com; Appana Durga > Kedareswara Rao <appanad@xilinx.com> > Subject: Re: [PATCH v3 2/3] dt-bindings: fpga: Add binding doc for versal fpga > manager > > On Thu, Mar 04, 2021 at 12:32:23PM +0530, Nava kishore Manne wrote: > > From: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> > > > > This patch adds binding doc for versal fpga manager driver. > > Why do you need a DT entry for this? Can't the Versal firmware driver > instantiate the fpga-mgr device? > This dt entry is need to handle the fpga regions properly for both full and Partial bitstream loading use cases and it cannot be done by Versal firmware driver instantiate. Complete firmware DT node example is shown below for your reference. Example for full FPGA configuration: fpga-region0 { compatible = "fpga-region"; fpga-mgr = <&versal_fpga>; #address-cells = <0x1>; #size-cells = <0x1>; }; firmware { zynqmp_firmware: zynqmp-firmware { compatible = "xlnx,zynqmp-firmware"; method = "smc"; versal_fpga: fpga { compatible = "xlnx,versal-fpga"; }; }; }; Please correct me if my understanding is wrong... Regards, Navakishore.
On Wed, Mar 10, 2021 at 3:50 AM Nava kishore Manne <navam@xilinx.com> wrote: > > Hi Rob, > > Thanks for providing the review comments. > Please find my response inline. > > > -----Original Message----- > > From: Rob Herring <robh@kernel.org> > > Sent: Tuesday, March 9, 2021 1:50 AM > > To: Nava kishore Manne <navam@xilinx.com> > > Cc: mdf@kernel.org; trix@redhat.com; Michal Simek <michals@xilinx.com>; > > gregkh@linuxfoundation.org; Jolly Shah <JOLLYS@xilinx.com>; Rajan Vaja > > <RAJANV@xilinx.com>; arnd@arndb.de; Manish Narani > > <MNARANI@xilinx.com>; Amit Sunil Dhamne <amitsuni@xilinx.com>; Tejas > > Patel <tejasp@xlnx.xilinx.com>; linux-fpga@vger.kernel.org; > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > > kernel@lists.infradead.org; chinnikishore369@gmail.com; Appana Durga > > Kedareswara Rao <appanad@xilinx.com> > > Subject: Re: [PATCH v3 2/3] dt-bindings: fpga: Add binding doc for versal fpga > > manager > > > > On Thu, Mar 04, 2021 at 12:32:23PM +0530, Nava kishore Manne wrote: > > > From: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> > > > > > > This patch adds binding doc for versal fpga manager driver. > > > > Why do you need a DT entry for this? Can't the Versal firmware driver > > instantiate the fpga-mgr device? > > > This dt entry is need to handle the fpga regions properly for both full and Partial bitstream loading use cases and it cannot be done by Versal firmware driver instantiate. Ah yes, I forgot about that. Rob
On Wed, Mar 10, 2021 at 10:12 AM Rob Herring <robh@kernel.org> wrote: > > On Wed, Mar 10, 2021 at 3:50 AM Nava kishore Manne <navam@xilinx.com> wrote: > > > > Hi Rob, > > > > Thanks for providing the review comments. > > Please find my response inline. > > > > > -----Original Message----- > > > From: Rob Herring <robh@kernel.org> > > > Sent: Tuesday, March 9, 2021 1:50 AM > > > To: Nava kishore Manne <navam@xilinx.com> > > > Cc: mdf@kernel.org; trix@redhat.com; Michal Simek <michals@xilinx.com>; > > > gregkh@linuxfoundation.org; Jolly Shah <JOLLYS@xilinx.com>; Rajan Vaja > > > <RAJANV@xilinx.com>; arnd@arndb.de; Manish Narani > > > <MNARANI@xilinx.com>; Amit Sunil Dhamne <amitsuni@xilinx.com>; Tejas > > > Patel <tejasp@xlnx.xilinx.com>; linux-fpga@vger.kernel.org; > > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > > > kernel@lists.infradead.org; chinnikishore369@gmail.com; Appana Durga > > > Kedareswara Rao <appanad@xilinx.com> > > > Subject: Re: [PATCH v3 2/3] dt-bindings: fpga: Add binding doc for versal fpga > > > manager > > > > > > On Thu, Mar 04, 2021 at 12:32:23PM +0530, Nava kishore Manne wrote: > > > > From: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> > > > > > > > > This patch adds binding doc for versal fpga manager driver. > > > > > > Why do you need a DT entry for this? Can't the Versal firmware driver > > > instantiate the fpga-mgr device? > > > > > This dt entry is need to handle the fpga regions properly for both full and Partial bitstream loading use cases and it cannot be done by Versal firmware driver instantiate. > > Ah yes, I forgot about that. Looking at this some more, please convert xlnx,zynqmp-firmware.txt to schema and add the node for this there. We don't need a whole other schema file just for a node and compatible. Also, looks like xlnx,zynqmp-pcap-fpga.txt is the prior version of the same thing, so it should be handled in the schema too. Rob
Hi Rob, Please find my response inline. > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: Wednesday, March 10, 2021 10:50 PM > To: Nava kishore Manne <navam@xilinx.com> > Cc: mdf@kernel.org; trix@redhat.com; Michal Simek <michals@xilinx.com>; > gregkh@linuxfoundation.org; Jolly Shah <JOLLYS@xilinx.com>; Rajan Vaja > <RAJANV@xilinx.com>; arnd@arndb.de; Manish Narani > <MNARANI@xilinx.com>; Amit Sunil Dhamne <amitsuni@xilinx.com>; Tejas > Patel <tejasp@xlnx.xilinx.com>; linux-fpga@vger.kernel.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; chinnikishore369@gmail.com; Appana Durga > Kedareswara Rao <appanad@xilinx.com> > Subject: Re: [PATCH v3 2/3] dt-bindings: fpga: Add binding doc for versal fpga > manager > > On Wed, Mar 10, 2021 at 10:12 AM Rob Herring <robh@kernel.org> wrote: > > > > On Wed, Mar 10, 2021 at 3:50 AM Nava kishore Manne > <navam@xilinx.com> wrote: > > > > > > Hi Rob, > > > > > > Thanks for providing the review comments. > > > Please find my response inline. > > > > > > > -----Original Message----- > > > > From: Rob Herring <robh@kernel.org> > > > > Sent: Tuesday, March 9, 2021 1:50 AM > > > > To: Nava kishore Manne <navam@xilinx.com> > > > > Cc: mdf@kernel.org; trix@redhat.com; Michal Simek > > > > <michals@xilinx.com>; gregkh@linuxfoundation.org; Jolly Shah > > > > <JOLLYS@xilinx.com>; Rajan Vaja <RAJANV@xilinx.com>; > > > > arnd@arndb.de; Manish Narani <MNARANI@xilinx.com>; Amit Sunil > > > > Dhamne <amitsuni@xilinx.com>; Tejas Patel > > > > <tejasp@xlnx.xilinx.com>; linux-fpga@vger.kernel.org; > > > > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > > > > linux-arm- kernel@lists.infradead.org; chinnikishore369@gmail.com; > > > > Appana Durga Kedareswara Rao <appanad@xilinx.com> > > > > Subject: Re: [PATCH v3 2/3] dt-bindings: fpga: Add binding doc for > > > > versal fpga manager > > > > > > > > On Thu, Mar 04, 2021 at 12:32:23PM +0530, Nava kishore Manne > wrote: > > > > > From: Appana Durga Kedareswara rao > <appana.durga.rao@xilinx.com> > > > > > > > > > > This patch adds binding doc for versal fpga manager driver. > > > > > > > > Why do you need a DT entry for this? Can't the Versal firmware > > > > driver instantiate the fpga-mgr device? > > > > > > > This dt entry is need to handle the fpga regions properly for both full and > Partial bitstream loading use cases and it cannot be done by Versal firmware > driver instantiate. > > > > Ah yes, I forgot about that. > > Looking at this some more, please convert xlnx,zynqmp-firmware.txt to > schema and add the node for this there. We don't need a whole other > schema file just for a node and compatible. Also, looks like xlnx,zynqmp- > pcap-fpga.txt is the prior version of the same thing, so it should be handled > in the schema too. > Will fix this in the next version Regards, Navakishore.
diff --git a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml new file mode 100644 index 000000000000..fec6144766fe --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/xlnx,versal-fpga.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal FPGA driver. + +maintainers: + - Nava kishore Manne <nava.manne@xilinx.com> + +description: | + Device Tree Versal FPGA bindings for the Versal SoC, controlled + using firmware interface. + +properties: + compatible: + items: + - enum: + - xlnx,versal-fpga + +required: + - compatible + +additionalProperties: false + +examples: + - | + versal_fpga: fpga { + compatible = "xlnx,versal-fpga"; + }; + +...