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Fri, 2 Apr 2021 02:17:32 -0700 Envelope-to: git@xilinx.com, mdf@kernel.org, trix@redhat.com, robh+dt@kernel.org, sumit.semwal@linaro.org, christian.koenig@amd.com, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org Received: from [10.140.6.60] (port=55560 helo=xhdnavam40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1lSFvm-0005T9-Uy; Fri, 02 Apr 2021 02:17:31 -0700 From: Nava kishore Manne To: , , , , , , , , , , , , , CC: Nava kishore Manne Subject: [PATCH RFC 1/3] fpga: region: Add fpga-region property 'fpga-config-from-dmabuf' Date: Fri, 2 Apr 2021 14:39:31 +0530 Message-ID: <20210402090933.32276-2-nava.manne@xilinx.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210402090933.32276-1-nava.manne@xilinx.com> References: <20210402090933.32276-1-nava.manne@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 75f76c55-42ba-4c07-31c9-08d8f5b83e3a X-MS-TrafficTypeDiagnostic: BN8PR02MB5778: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2021 09:18:13.9034 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 75f76c55-42ba-4c07-31c9-08d8f5b83e3a X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT050.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR02MB5778 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org Add "fpga-config-from-dmabuf" property to allow the bitstream configuration from pre-allocated dma-buffer. Signed-off-by: Nava kishore Manne --- Documentation/devicetree/bindings/fpga/fpga-region.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt index 969ca53bb65e..c573cf258d60 100644 --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt @@ -177,6 +177,8 @@ Optional properties: it indicates that the FPGA has already been programmed with this image. If this property is in an overlay targeting a FPGA region, it is a request to program the FPGA with that image. +- fpga-config-from-dmabuf : boolean, set if the FPGA configured done from the + pre-allocated dma-buffer. - fpga-bridges : should contain a list of phandles to FPGA Bridges that must be controlled during FPGA programming along with the parent FPGA bridge. This property is optional if the FPGA Manager handles the bridges.