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Thu, 20 May 2021 01:10:14 -0700 Envelope-to: git@xilinx.com, robh+dt@kernel.org, mdf@kernel.org, trix@redhat.com, arnd@arndb.de, gregkh@linuxfoundation.org, zou_wei@huawei.com, iwamatsu@nigauri.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org, chinnikishore369@gmail.com Received: from [10.140.6.60] (port=42624 helo=xhdnavam40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1ljdkz-0007IV-8Z; Thu, 20 May 2021 01:10:13 -0700 From: Nava kishore Manne To: , , , , , , , , , , , , , , , , , , , , CC: Appana Durga Kedareswara rao Subject: [PATCH v6 2/4] dt-bindings: fpga: Add binding doc for versal fpga manager Date: Thu, 20 May 2021 13:39:52 +0530 Message-ID: <20210520080954.1393-3-nava.manne@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210520080954.1393-1-nava.manne@xilinx.com> References: <20210520080954.1393-1-nava.manne@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f1474629-b071-4e9d-1e55-08d91b66d7a3 X-MS-TrafficTypeDiagnostic: CH2PR02MB6294: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:4125; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 May 2021 08:11:16.7241 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f1474629-b071-4e9d-1e55-08d91b66d7a3 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT0042.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR02MB6294 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Appana Durga Kedareswara rao This patch adds binding doc for versal fpga manager driver. Signed-off-by: Nava kishore Manne Signed-off-by: Appana Durga Kedareswara rao Reviewed-by: Rob Herring --- Changes for v2: -Fixed file format and syntax issues. Changes for v3: -Removed unwated extra spaces. Changes for v4: -Rebased the changes on linux-next. No functional changes Changes for v5: -Updated fpga node name to versal_fpga. Changes for v6: -None. .../bindings/fpga/xlnx,versal-fpga.yaml | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml diff --git a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml new file mode 100644 index 000000000000..ac6a207278d5 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/xlnx,versal-fpga.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal FPGA driver. + +maintainers: + - Nava kishore Manne + +description: | + Device Tree Versal FPGA bindings for the Versal SoC, controlled + using firmware interface. + +properties: + compatible: + items: + - enum: + - xlnx,versal-fpga + +required: + - compatible + +additionalProperties: false + +examples: + - | + versal_fpga: versal_fpga { + compatible = "xlnx,versal-fpga"; + }; + +...