From patchwork Mon Mar 21 08:53:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Bornyakov X-Patchwork-Id: 12787013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC8E5C433F5 for ; Mon, 21 Mar 2022 09:15:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345733AbiCUJOo (ORCPT ); Mon, 21 Mar 2022 05:14:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345732AbiCUJOm (ORCPT ); Mon, 21 Mar 2022 05:14:42 -0400 Received: from mail.pr-group.ru (mail.pr-group.ru [178.18.215.3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BCD9B31221; Mon, 21 Mar 2022 02:13:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=metrotek.ru; s=mail; h=from:subject:date:message-id:to:cc:mime-version:content-transfer-encoding: in-reply-to:references; bh=cW97tF9dygiHq7o/+gILOv2WKq3Hft3IjKo4B2OX804=; b=coWnny8qKjTlyivEt/e70eY3W3J1Y/pDjAmMlFcseCPZJxnNZ0tFUjmZ7XXtrAgxfu/HMZufii7p9 p7cvgnenOiv+/Bcc73ljRYn1NwxMDZVODMCLR7v9EzNt5IQZjXH115yospFf310ck0Ofusq1j05LH6 ATq5OhqGJwt+mJ7PyjxECyR+OLAe09X8ALv5rB9tTw2qv9kJsFLi9WKctoF5VUh2uU5DKxrUpPpRs+ 32kt2yltWn62cfDTPSSkxiJbxl9k/uH4fcOTE4rRjIPjNgNgCfZ3ENduXYi8dWKw4tqFM6k333lmEt 8HXwJyFlx+ar5rTai24jVAwmZiwvZZg== X-Kerio-Anti-Spam: Build: [Engines: 2.16.2.1410, Stamp: 3], Multi: [Enabled, t: (0.000009,0.008590)], BW: [Enabled, t: (0.000028,0.000002)], RTDA: [Enabled, t: (0.067393), Hit: No, Details: v2.28.0; Id: 15.52k225.1fuls0iij.3s20; mclb], total: 0(700) X-Footer: bWV0cm90ZWsucnU= Received: from localhost.localdomain ([85.143.252.66]) (authenticated user i.bornyakov@metrotek.ru) by mail.pr-group.ru with ESMTPSA (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256 bits)); Mon, 21 Mar 2022 12:12:58 +0300 From: Ivan Bornyakov Cc: Ivan Bornyakov , mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com, trix@redhat.com, conor.dooley@microchip.com, robh+dt@kernel.org, system@metrotek.ru, linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v5 2/2] dt-bindings: fpga: add binding doc for microchip-spi fpga mgr Date: Mon, 21 Mar 2022 11:53:42 +0300 Message-Id: <20220321085342.22228-3-i.bornyakov@metrotek.ru> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321085342.22228-1-i.bornyakov@metrotek.ru> References: <20220321085342.22228-1-i.bornyakov@metrotek.ru> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org Add Device Tree Binding doc for Microchip Polarfire FPGA Manager using slave SPI to load .dat formatted bitstream image. Signed-off-by: Ivan Bornyakov --- .../fpga/microchip,mpf-spi-fpga-mgr.yaml | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml diff --git a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml new file mode 100644 index 000000000000..6955fc527ed2 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/microchip,mpf-spi-fpga-mgr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Polarfire FPGA manager. + +description: | + Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to + load the bitstream in .dat format. + +properties: + compatible: + items: + - enum: + - microchip,mpf-spi-fpga-mgr + + reg: + items: + - description: spi chip select + +examples: + - | + spi@2008000 { + ... + fpga_mgr: fpga_mgr@0 { + compatible = "microchip,mpf-spi-fpga-mgr"; + spi-max-frequency = <20000000>; + reg = <0>; + }; + };