From patchwork Sat May 7 07:43:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Bornyakov X-Patchwork-Id: 12841895 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDBDBC433EF for ; Sat, 7 May 2022 08:06:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1446050AbiEGIIc (ORCPT ); Sat, 7 May 2022 04:08:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1446042AbiEGIIa (ORCPT ); Sat, 7 May 2022 04:08:30 -0400 Received: from mail.pr-group.ru (mail.pr-group.ru [178.18.215.3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 603565AECB; Sat, 7 May 2022 01:04:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=metrotek.ru; s=mail; h=from:subject:date:message-id:to:cc:mime-version:content-transfer-encoding: in-reply-to:references; bh=Y+q3Espln8Rodgx5Nn4tnLIErSJz4K4izMOM418Zr7I=; b=cG3OzKcjLqlrVHYxW1JIfwxbTpEQy+qt4LI0m4B/XOe2RA1iELQjiSgCofntmiIljpU5m7EQz5R7g EwITgSBhScsl+NamlL33uvFuBH56g8fQZmvZAkOn4MFqZ4jsw6iRLC0H+mzUzDk8HsLwmAPaOpOpfX h5pGS64nfDthaaP8hj6ZfzzCVWKyys0jcDO8U0r/71llmFN8g9Wy96pUkUpXHxWnSdXcfWgKgigqbr XWywDX++3pKm4BnOyoVNu6Afi7vFz8d7t9SRH64VVZIoAfBrjf6q3vrizs2MFMUZfnpvTiHjU1X3i3 qoybMHnnKF0TU4TjPY3Cw55nORxUQ7g== X-Kerio-Anti-Spam: Build: [Engines: 2.16.3.1422, Stamp: 3], Multi: [Enabled, t: (0.000009,0.007970)], BW: [Enabled, t: (0.000020,0.000001)], RTDA: [Enabled, t: (0.065212), Hit: No, Details: v2.39.0; Id: 15.52k867.1g2eoor49.2j01; mclb], total: 0(700) X-Footer: bWV0cm90ZWsucnU= Received: from localhost.localdomain ([178.70.36.174]) (authenticated user i.bornyakov@metrotek.ru) by mail.pr-group.ru with ESMTPSA (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256 bits)); Sat, 7 May 2022 11:04:23 +0300 From: Ivan Bornyakov Cc: mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com, trix@redhat.com, conor.dooley@microchip.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, system@metrotek.ru, Ivan Bornyakov , Rob Herring Subject: [PATCH v11 3/3] dt-bindings: fpga: add binding doc for microchip-spi fpga mgr Date: Sat, 7 May 2022 10:43:04 +0300 Message-Id: <20220507074304.11144-4-i.bornyakov@metrotek.ru> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220507074304.11144-1-i.bornyakov@metrotek.ru> References: <20220507074304.11144-1-i.bornyakov@metrotek.ru> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org Add Device Tree Binding doc for Microchip Polarfire FPGA Manager using slave SPI to load .dat formatted bitstream image. Signed-off-by: Ivan Bornyakov Reviewed-by: Rob Herring --- .../fpga/microchip,mpf-spi-fpga-mgr.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml diff --git a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml new file mode 100644 index 000000000000..aee45cb15592 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/microchip,mpf-spi-fpga-mgr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Polarfire FPGA manager. + +maintainers: + - Ivan Bornyakov + +description: + Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to + load the bitstream in .dat format. + +properties: + compatible: + enum: + - microchip,mpf-spi-fpga-mgr + + reg: + description: SPI chip select + maxItems: 1 + + spi-max-frequency: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + fpga_mgr@0 { + compatible = "microchip,mpf-spi-fpga-mgr"; + spi-max-frequency = <20000000>; + reg = <0>; + }; + };