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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Aug 2022 03:56:01.6512 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2141f2f5-9c70-4201-9af2-08da85848fa3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT029.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5923 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org Updates binding document for the zynqmp afi config node to handle the PS_PL Bus-width and resets. Signed-off-by: Nava kishore Manne --- .../bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml index f14f7b454f07..9504665cad95 100644 --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml @@ -59,6 +59,13 @@ properties: controller. type: object + zynqmp-fpga: + $ref: /schemas/fpga/xlnx,zynqmp-afi-fpga.yaml# + description: The Zynq UltraScale+ MPSoC Processing System core provides + access from PL masters to PS internal peripherals, and memory through + AXI FIFO interface(AFI) + type: object + required: - compatible