From patchwork Fri Mar 31 07:18:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13195338 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C3E7C77B60 for ; Fri, 31 Mar 2023 07:20:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229553AbjCaHTH (ORCPT ); Fri, 31 Mar 2023 03:19:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230092AbjCaHTE (ORCPT ); Fri, 31 Mar 2023 03:19:04 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86998191CB; Fri, 31 Mar 2023 00:18:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1680247138; x=1711783138; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hmGr/C098Sb3AUXweabbmZpCcG7wYNzd0OEreJaxcco=; b=NCsti61scp6XrceIFYpxP1qKVOaOJdJhRGjgxc5hwngqvezNUbHIMWP6 dq/wZI2lnXJ6yXWtiJ/t2hnJ5WWTSOeFmc0fTu3NKwZG7MUgo0jVN4uAN r/E24wl9kcYFy2Y/FhdFDfl8D4Xpcw/7SstWDCGOdFoWGlqSmFHMi2CtU j+Pc8KHBBjLz3GYHGRCdPWCgDlT9E/dyQzz3jDfdQSy36CSDOvJNt11yX 90qyrJaWwRfQvlmvTeUc9Us4T9q8kXck0hckl/Xe3W4jD8vZKJpXILfEj OaugqGmpS1iUnvz/ySRPL1Hv16qCvaNqV2XsGgzzmEYQ64p5Dqki00t2v A==; X-IronPort-AV: E=Sophos;i="5.98,307,1673938800"; d="scan'208";a="204349754" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 31 Mar 2023 00:18:55 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 31 Mar 2023 00:18:49 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 31 Mar 2023 00:18:46 -0700 From: Conor Dooley To: CC: , , Daire McNamara , Rob Herring , "Krzysztof Kozlowski" , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix , , , , Rob Herring Subject: [PATCH v2 2/7] dt-bindings: soc: microchip: add a property for system controller flash Date: Fri, 31 Mar 2023 08:18:18 +0100 Message-ID: <20230331071823.956087-3-conor.dooley@microchip.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331071823.956087-1-conor.dooley@microchip.com> References: <20230331071823.956087-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1674; i=conor.dooley@microchip.com; h=from:subject; bh=hmGr/C098Sb3AUXweabbmZpCcG7wYNzd0OEreJaxcco=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDClqnZat0x4YKoUkRnlFv5DtTu/kFma+UZoafsbv3LKSiOsW Vxs7SlkYxDgYZMUUWRJv97VIrf/jssO55y3MHFYmkCEMXJwCMJFZNowME/X7pt97O3VWxgGfDLfjoS U/xQycSqe9cM5bx1zQ7XVAi5Fhuaoqx9e2ZQwB7fabNzU7rVt+c0PpQQW+tK9f9xtJ3p7CDQA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org The system controller "shares" a SPI flash device with a QSPI controller in the MSS. This flash is used to store FPGA bitstreams & other metadata. IAP and Auto Upgrade both write images to this flash that the System Controller will use to re-program the FPGA. Add a phandle property signifying which flash device is connected to the system controller. Reviewed-by: Rob Herring Signed-off-by: Conor Dooley --- .../soc/microchip/microchip,mpfs-sys-controller.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml index 04ffee3a7c59..aee96c639af7 100644 --- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml @@ -26,6 +26,16 @@ properties: compatible: const: microchip,mpfs-sys-controller + microchip,bitstream-flash: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The SPI flash connected to the system controller's QSPI controller. + The system controller may retrieve FPGA bitstreams from this flash to + perform In-Application Programming (IAP) or during device initialisation + for Auto Update. The MSS and system controller have separate QSPI + controllers and this flash is connected to both. Software running in the + MSS can write bitstreams to the flash. + required: - compatible - mboxes