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[2.34.28.169]) by smtp.gmail.com with ESMTPSA id oo11-20020a05620a530b00b0074db94ed42fsm965516qkn.116.2023.05.11.07.19.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 May 2023 07:19:51 -0700 (PDT) From: Marco Pagani To: Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix Cc: Marco Pagani , linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org Subject: [RFC PATCH v5 1/4] fpga: add fake FPGA manager Date: Thu, 11 May 2023 16:19:19 +0200 Message-Id: <20230511141922.437328-2-marpagan@redhat.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230511141922.437328-1-marpagan@redhat.com> References: <20230511141922.437328-1-marpagan@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org Add fake FPGA manager platform driver with support functions. This module is part of the KUnit tests for the FPGA subsystem. Signed-off-by: Marco Pagani --- drivers/fpga/tests/fake-fpga-mgr.c | 271 +++++++++++++++++++++++++++++ drivers/fpga/tests/fake-fpga-mgr.h | 53 ++++++ 2 files changed, 324 insertions(+) create mode 100644 drivers/fpga/tests/fake-fpga-mgr.c create mode 100644 drivers/fpga/tests/fake-fpga-mgr.h diff --git a/drivers/fpga/tests/fake-fpga-mgr.c b/drivers/fpga/tests/fake-fpga-mgr.c new file mode 100644 index 000000000000..1e994db10159 --- /dev/null +++ b/drivers/fpga/tests/fake-fpga-mgr.c @@ -0,0 +1,271 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for the fake FPGA manager + * + * Copyright (C) 2023 Red Hat, Inc. + * + * Author: Marco Pagani + */ + +#include +#include +#include +#include + +#include "fake-fpga-mgr.h" + +#define FAKE_FPGA_MGR_DEV_NAME "fake_fpga_mgr" + +struct fake_mgr_pdata { + struct kunit *test; + struct fake_fpga_mgr_stats *stats; +}; + +struct fake_mgr_priv { + int seq_num; + struct fake_mgr_pdata *pdata; +}; + +static bool check_header(struct kunit *test, const char *buf, size_t count) +{ + size_t i; + + for (i = 0; i < count; i++) + if (buf[i] != TEST_HEADER_MAGIC) + return false; + + return true; +} + +static enum fpga_mgr_states op_state(struct fpga_manager *mgr) +{ + struct fake_mgr_priv *priv; + + priv = mgr->priv; + + kunit_info(priv->pdata->test, "Fake FPGA manager: state\n"); + + return mgr->state; +} + +static u64 op_status(struct fpga_manager *mgr) +{ + struct fake_mgr_priv *priv; + + priv = mgr->priv; + + kunit_info(priv->pdata->test, "Fake FPGA manager: status\n"); + + return 0; +} + +static int op_parse_header(struct fpga_manager *mgr, struct fpga_image_info *info, + const char *buf, size_t count) +{ + struct fake_mgr_priv *priv; + + priv = mgr->priv; + + /* Set header_size and data_size as expected */ + info->header_size = TEST_HEADER_SIZE; + info->data_size = info->count - TEST_HEADER_SIZE; + + priv->pdata->stats->header_done = check_header(priv->pdata->test, buf, + info->header_size); + priv->pdata->stats->op_parse_header_state = mgr->state; + priv->pdata->stats->op_parse_header_seq = priv->seq_num++; + + kunit_info(priv->pdata->test, "Fake FPGA manager: parse_header\n"); + + return 0; +} + +static int op_write_init(struct fpga_manager *mgr, struct fpga_image_info *info, + const char *buf, size_t count) +{ + struct fake_mgr_priv *priv; + + priv = mgr->priv; + + priv->pdata->stats->op_write_init_state = mgr->state; + priv->pdata->stats->op_write_init_seq = priv->seq_num++; + + kunit_info(priv->pdata->test, "Fake FPGA manager: write_init\n"); + + return 0; +} + +static int op_write(struct fpga_manager *mgr, const char *buf, size_t count) +{ + struct fake_mgr_priv *priv; + + priv = mgr->priv; + + priv->pdata->stats->op_write_state = mgr->state; + priv->pdata->stats->op_write_seq = priv->seq_num++; + + kunit_info(priv->pdata->test, "Fake FPGA manager: write\n"); + + return 0; +} + +static int op_write_sg(struct fpga_manager *mgr, struct sg_table *sgt) +{ + struct fake_mgr_priv *priv; + + priv = mgr->priv; + + priv->pdata->stats->op_write_state = mgr->state; + priv->pdata->stats->op_write_seq = priv->seq_num++; + + kunit_info(priv->pdata->test, "Fake FPGA manager: write_sg\n"); + + return 0; +} + +static int op_write_complete(struct fpga_manager *mgr, struct fpga_image_info *info) +{ + struct fake_mgr_priv *priv; + + priv = mgr->priv; + + priv->pdata->stats->op_write_complete_state = mgr->state; + priv->pdata->stats->op_write_complete_seq = priv->seq_num++; + priv->pdata->stats->prog_count++; + + kunit_info(priv->pdata->test, "Fake FPGA manager: write_complete\n"); + + return 0; +} + +static void op_fpga_remove(struct fpga_manager *mgr) +{ + struct fake_mgr_priv *priv; + + priv = mgr->priv; + + kunit_info(priv->pdata->test, "Fake FPGA manager: remove\n"); +} + +static const struct fpga_manager_ops fake_fpga_mgr_ops = { + .skip_header = false, + .state = op_state, + .status = op_status, + .parse_header = op_parse_header, + .write_init = op_write_init, + .write = op_write, + .write_sg = op_write_sg, + .write_complete = op_write_complete, + .fpga_remove = op_fpga_remove, +}; + +/** + * fake_fpga_mgr_register() - register a fake FPGA manager. + * @test: KUnit test context object. + * @mgr_ctx: fake FPGA manager context data structure. + * + * Return: pointer to a new fake FPGA manager on success, an ERR_PTR() + * encoded error code on failure. + */ +struct fake_fpga_mgr * +fake_fpga_mgr_register(struct kunit *test, struct device *parent) +{ + struct fake_fpga_mgr *mgr_ctx; + struct fake_mgr_pdata pdata; + int ret; + + mgr_ctx = kunit_kzalloc(test, sizeof(*mgr_ctx), GFP_KERNEL); + if (!mgr_ctx) { + ret = -ENOMEM; + goto err_mem; + } + + mgr_ctx->pdev = platform_device_alloc(FAKE_FPGA_MGR_DEV_NAME, + PLATFORM_DEVID_AUTO); + if (!mgr_ctx->pdev) { + kunit_err(test, "Fake FPGA manager device allocation failed\n"); + ret = -ENOMEM; + goto err_mem; + } + + pdata.test = test; + pdata.stats = &mgr_ctx->stats; + platform_device_add_data(mgr_ctx->pdev, &pdata, sizeof(pdata)); + + mgr_ctx->pdev->dev.parent = parent; + ret = platform_device_add(mgr_ctx->pdev); + if (ret) { + kunit_err(test, "Fake FPGA manager device add failed\n"); + goto err_pdev; + } + + mgr_ctx->mgr = platform_get_drvdata(mgr_ctx->pdev); + + kunit_info(test, "Fake FPGA manager registered\n"); + + return mgr_ctx; + +err_pdev: + platform_device_put(mgr_ctx->pdev); +err_mem: + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(fake_fpga_mgr_register); + +/** + * fake_fpga_mgr_unregister() - unregister a fake FPGA manager. + * @mgr_ctx: fake FPGA manager context data structure. + */ +void fake_fpga_mgr_unregister(struct fake_fpga_mgr *mgr_ctx) +{ + struct fake_mgr_priv *priv; + struct kunit *test; + + if (!mgr_ctx) + return; + + priv = mgr_ctx->mgr->priv; + test = priv->pdata->test; + + platform_device_unregister(mgr_ctx->pdev); + + kunit_info(test, "Fake FPGA manager unregistered\n"); +} +EXPORT_SYMBOL_GPL(fake_fpga_mgr_unregister); + +static int fake_fpga_mgr_probe(struct platform_device *pdev) +{ + struct device *dev; + struct fake_mgr_pdata *pdata; + struct fpga_manager *mgr; + struct fake_mgr_priv *priv; + + dev = &pdev->dev; + pdata = dev_get_platdata(dev); + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->pdata = pdata; + + mgr = devm_fpga_mgr_register(dev, "Fake FPGA Manager", + &fake_fpga_mgr_ops, priv); + if (IS_ERR(mgr)) + return PTR_ERR(mgr); + + platform_set_drvdata(pdev, mgr); + + return 0; +} + +static struct platform_driver fake_fpga_mgr_drv = { + .driver = { + .name = FAKE_FPGA_MGR_DEV_NAME + }, + .probe = fake_fpga_mgr_probe, +}; + +module_platform_driver(fake_fpga_mgr_drv); + +MODULE_LICENSE("GPL"); diff --git a/drivers/fpga/tests/fake-fpga-mgr.h b/drivers/fpga/tests/fake-fpga-mgr.h new file mode 100644 index 000000000000..282c20d8e40c --- /dev/null +++ b/drivers/fpga/tests/fake-fpga-mgr.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Header file for the fake FPGA manager + * + * Copyright (C) 2023 Red Hat, Inc. + * + * Author: Marco Pagani + */ + +#ifndef __FPGA_FAKE_MGR_H +#define __FPGA_FAKE_MGR_H + +#include +#include +#include +#include + +#define FPGA_IMG_BLOCK 1024 +#define TEST_HEADER_MAGIC 0x3f +#define TEST_HEADER_SIZE FPGA_IMG_BLOCK + +struct fake_fpga_mgr_stats { + u32 prog_count; + bool header_done; + u32 op_parse_header_seq; + u32 op_write_init_seq; + u32 op_write_seq; + u32 op_write_complete_seq; + enum fpga_mgr_states op_parse_header_state; + enum fpga_mgr_states op_write_init_state; + enum fpga_mgr_states op_write_state; + enum fpga_mgr_states op_write_complete_state; +}; + +/** + * struct fake_fpga_mgr - fake FPGA manager context data structure + * + * @mgr: FPGA manager. + * @pdev: platform device of the FPGA manager. + * @stats: info from the low level driver. + */ +struct fake_fpga_mgr { + struct fpga_manager *mgr; + struct platform_device *pdev; + struct fake_fpga_mgr_stats stats; +}; + +struct fake_fpga_mgr * +fake_fpga_mgr_register(struct kunit *test, struct device *parent); + +void fake_fpga_mgr_unregister(struct fake_fpga_mgr *mgr_ctx); + +#endif /* __FPGA_FAKE_MGR_H */