From patchwork Fri Apr 12 16:10:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 13628067 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7F2E1487F6; Fri, 12 Apr 2024 16:11:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.176.79.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712938290; cv=none; b=hcK+34DqwurhmNbKZctT9y4agzVUqWMZIC/eGYavt5L7piPr7id+wPDEyvLrV7zD3nMr+nmm6L8OWYMhn+QTqyvE9kXOUESSQS6GTxSnMejkUAPNR9WYpxF6xfvechdbQOB34EJUqlsr4EFwTETWCsVxCoS9x6BlEMU3Xt7wTsY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712938290; c=relaxed/simple; bh=eebXRk/Vq9dUPdGZI1v+7N3F9iDnjwENQ3CMAL/LV5Q=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=o6Mqc98cebqIncJfinUxJ2yTvK0IFVOunyG8UN3tKjJgVAPfMsbP3nLvuO0pimvNIPUlNiTXQAMl5q435fqnmYa3jPv1eY5G664suj/Jk2iI/9gbCZynXWpwsebvnRSze9vw6QYpjPZWqW62DHFjN/oiIAzPCVbs85yNSF0+RLo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=185.176.79.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.18.186.31]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4VGM2r2L5mz67GVD; Sat, 13 Apr 2024 00:09:40 +0800 (CST) Received: from lhrpeml500005.china.huawei.com (unknown [7.191.163.240]) by mail.maildlp.com (Postfix) with ESMTPS id 3F93D1400F4; Sat, 13 Apr 2024 00:11:26 +0800 (CST) Received: from SecurePC-101-06.china.huawei.com (10.122.247.231) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Fri, 12 Apr 2024 17:11:25 +0100 From: Jonathan Cameron To: Mark Rutland , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Will Deacon , , , CC: , Shaokun Zhang , Yicong Yang , Jiucheng Xu , Khuong Dinh , Atish Patra , Anup Patel , Andy Gross , Bjorn Andersson , Frank Li , Shuai Xue , Vineet Gupta , Shawn Guo , Fenghua Yu , Dave Jiang , Wu Hao , Tom Rix , , Suzuki K Poulose , Liang Kan Subject: [PATCH v2 01/30] perf/hisi-pcie: Assign parent for event_source device Date: Fri, 12 Apr 2024 17:10:28 +0100 Message-ID: <20240412161057.14099-2-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240412161057.14099-1-Jonathan.Cameron@huawei.com> References: <20240412161057.14099-1-Jonathan.Cameron@huawei.com> Precedence: bulk X-Mailing-List: linux-fpga@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: lhrpeml100003.china.huawei.com (7.191.160.210) To lhrpeml500005.china.huawei.com (7.191.163.240) Currently the PMU device appears directly under /sys/devices/ Only root busses should appear there, so instead assign the pmu->dev parent to be the PCI device. Link: https://lore.kernel.org/linux-cxl/ZCLI9A40PJsyqAmq@kroah.com/ Reviewed-by: Yicong Yang Reviewed-by: Greg Kroah-Hartman Signed-off-by: Jonathan Cameron --- drivers/perf/hisilicon/hisi_pcie_pmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c index 5d1f0e9fdb08..eacbd4e51ba6 100644 --- a/drivers/perf/hisilicon/hisi_pcie_pmu.c +++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c @@ -807,6 +807,7 @@ static int hisi_pcie_alloc_pmu(struct pci_dev *pdev, struct hisi_pcie_pmu *pcie_ pcie_pmu->pmu = (struct pmu) { .name = name, .module = THIS_MODULE, + .parent = &pdev->dev, .event_init = hisi_pcie_pmu_event_init, .pmu_enable = hisi_pcie_pmu_enable, .pmu_disable = hisi_pcie_pmu_disable,