From patchwork Wed Nov 9 13:21:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Borislav Petkov X-Patchwork-Id: 9419199 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0805660585 for ; Wed, 9 Nov 2016 13:21:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ED5AB1FF10 for ; Wed, 9 Nov 2016 13:21:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D762C29296; Wed, 9 Nov 2016 13:21:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 60F6A1FF10 for ; Wed, 9 Nov 2016 13:21:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753306AbcKINVV (ORCPT ); Wed, 9 Nov 2016 08:21:21 -0500 Received: from mx2.suse.de ([195.135.220.15]:43044 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751969AbcKINVT (ORCPT ); Wed, 9 Nov 2016 08:21:19 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 1ACF3ADC6; Wed, 9 Nov 2016 13:21:16 +0000 (UTC) Received: by pd.tnic (Postfix, from userid 1000) id AC3A21607F7; Wed, 9 Nov 2016 14:21:14 +0100 (CET) Date: Wed, 9 Nov 2016 14:21:14 +0100 From: Borislav Petkov To: Thomas Gleixner Cc: Kyle Huey , Robert O'Callahan , Andy Lutomirski , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Jeff Dike , Richard Weinberger , Alexander Viro , Shuah Khan , Dave Hansen , Peter Zijlstra , Boris Ostrovsky , Len Brown , "Rafael J. Wysocki" , Dmitry Safonov , David Matlack , linux-kernel@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, user-mode-linux-user@lists.sourceforge.net, linux-fsdevel@vger.kernel.org, linux-kselftest@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v10 6/7] x86/arch_prctl: Add ARCH_[GET|SET]_CPUID Message-ID: <20161109132114.3ujq2wkhsm4kcytz@pd.tnic> References: <20161108183956.4521-1-khuey@kylehuey.com> <20161108183956.4521-7-khuey@kylehuey.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20161014 (1.7.1) Sender: linux-fsdevel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fsdevel@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Tue, Nov 08, 2016 at 09:06:31PM +0100, Thomas Gleixner wrote: > The upcoming ring3 mwait stuff can add its magic to tweak that MSR into > this function. > > Stick the call at the end of init_scattered_cpuid_features() for now. I > still need to figure out a proper place for it. So Thomas and I discussed this more on IRC and I think we can get rid of the MSR iterating in scattered.c and integrate both the R3 MWAIT and CPUID faulting like this: --- Thanks. diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index fcd484d2bb03..5c38a85af2e7 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -452,6 +457,39 @@ static void intel_bsp_resume(struct cpuinfo_x86 *c) init_intel_energy_perf(c); } +static void init_misc_enables(struct cpuinfo_x86 *c) +{ + u64 val, misc_en; + + if (rdmsrl_safe(MSR_MISC_FEATURES_ENABLES, &misc_en)) + return; + + misc_en &= ~MSR_MISC_ENABLES_CPUID_FAULT_ENABLE; + + if (!rdmsrl_safe(MSR_PLATFORM_INFO, &val)) { + if (val & PLATINFO_CPUID_FAULT_BIT) + set_cpu_cap(c, X86_FEATURE_CPUID_FAULT); + } + + wrmsrl(MSR_MISC_FEATURES_ENABLES, misc_en); + this_cpu_write(msr_misc_features_enables_shadow, misc_en); +} + static void init_intel(struct cpuinfo_x86 *c) { unsigned int l2 = 0; @@ -565,6 +603,8 @@ static void init_intel(struct cpuinfo_x86 *c) detect_vmx_virtcap(c); init_intel_energy_perf(c); + + init_misc_enables(c); } #ifdef CONFIG_X86_32 --- Please redo your patchset and add the detection to init_intel() like above. Also, let's call that MSR mask MSR_MISC_ENABLES_CPUID_FAULT_ENABLE like the rest of the bits in msr-index.h