Message ID | 20230927140123.5283-11-joey.gouly@arm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Wed, 27 Sep 2023 14:01:38 +0000 Received: from e124191.cambridge.arm.com (10.1.197.45) by mail.arm.com (10.251.24.31) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Wed, 27 Sep 2023 14:01:38 +0000 From: Joey Gouly <joey.gouly@arm.com> To: <linux-arm-kernel@lists.infradead.org> CC: <nd@arm.com>, <akpm@linux-foundation.org>, <aneesh.kumar@linux.ibm.com>, <catalin.marinas@arm.com>, <dave.hansen@linux.intel.com>, <joey.gouly@arm.com>, <maz@kernel.org>, <oliver.upton@linux.dev>, <shuah@kernel.org>, <will@kernel.org>, <kvmarm@lists.linux.dev>, <linux-fsdevel@vger.kernel.org>, <linux-mm@kvack.org>, <linux-kselftest@vger.kernel.org> Subject: [PATCH v1 10/20] arm64: mask out POIndex when modifying a PTE Date: Wed, 27 Sep 2023 15:01:13 +0100 Message-ID: <20230927140123.5283-11-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230927140123.5283-1-joey.gouly@arm.com> References: <20230927140123.5283-1-joey.gouly@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: DBAEUR03FT051:EE_|AS2PR08MB8718:EE_|AM7EUR03FT045:EE_|PAVPR08MB9061:EE_ X-MS-Office365-Filtering-Correlation-Id: a6a19a76-a5ab-49a6-0b60-08dbbf626940 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 7f7d9b1df4e5..98ccfda05716 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -818,9 +818,10 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) * Normal and Normal-Tagged are two different memory types and indices * in MAIR_EL1. The mask below has to include PTE_ATTRINDX_MASK. */ - const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | + pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | PTE_PROT_NONE | PTE_VALID | PTE_WRITE | PTE_GP | - PTE_ATTRINDX_MASK; + PTE_ATTRINDX_MASK | PTE_PO_IDX_MASK; + /* preserve the hardware dirty information */ if (pte_hw_dirty(pte)) pte = set_pte_bit(pte, __pgprot(PTE_DIRTY));
When a PTE is modified, the POIndex must be masked off so that it can be modified. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> --- arch/arm64/include/asm/pgtable.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)