From patchwork Mon Oct 9 12:08:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 13413497 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABAF8E95A8E for ; Mon, 9 Oct 2023 12:14:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346505AbjJIMNv (ORCPT ); Mon, 9 Oct 2023 08:13:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346659AbjJIMNb (ORCPT ); Mon, 9 Oct 2023 08:13:31 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8F5510EB; Mon, 9 Oct 2023 05:12:32 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 694ADC433CD; Mon, 9 Oct 2023 12:12:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696853552; bh=/vPx3SSl+mfIKMquypHtEKuBIXlpLAB4iLa0L5RlD3w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=sQev2RNtEnDEFPBmWkg1aPYHogLgGleP2M9edpa6zdfjrOm77CPrvQi8niVT3Q3XA PmofI6bdrOe3jo465oZ65rqQozZTbERNjr1JlgHm9YKvcfsq3nEWGOY27pZmgfjjyY dDSMy7U4xKkDc8C60A7VbrEkW/LnelkzXfGdxcDiA0l3rymIJ+ckAVoGbH5xXkvHEN 6zP+9swYon2IccqrGEKpcXv0rcTceZlfZ3HMAZiaAMgZ4Bk4wkuyPEIExSAnXIRc6s zhy1goGSBeOKhYpRqjCoLzuKbooaSsK4gY62IJDkYR2h8CzvSzLQp21Fv5NqJLcB65 0bMJuO/3HSw5A== From: Mark Brown Date: Mon, 09 Oct 2023 13:08:50 +0100 Subject: [PATCH v6 16/38] arm64/idreg: Add overrride for GCS MIME-Version: 1.0 Message-Id: <20231009-arm64-gcs-v6-16-78e55deaa4dd@kernel.org> References: <20231009-arm64-gcs-v6-0-78e55deaa4dd@kernel.org> In-Reply-To: <20231009-arm64-gcs-v6-0-78e55deaa4dd@kernel.org> To: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Arnd Bergmann , Oleg Nesterov , Eric Biederman , Kees Cook , Shuah Khan , "Rick P. Edgecombe" , Deepak Gupta , Ard Biesheuvel , Szabolcs Nagy Cc: "H.J. Lu" , Paul Walmsley , Palmer Dabbelt , Albert Ou , Florian Weimer , Christian Brauner , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Brown X-Mailer: b4 0.13-dev-0438c X-Developer-Signature: v=1; a=openpgp-sha256; l=1992; i=broonie@kernel.org; h=from:subject:message-id; bh=/vPx3SSl+mfIKMquypHtEKuBIXlpLAB4iLa0L5RlD3w=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBlI+2drxB++QScfidUv9L+xi632YD4JcSnKHzTsqVd VSQXvKOJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZSPtnQAKCRAk1otyXVSH0A4PB/ 4ipjQMsBwdu2UD/vynqchKToRd0kqycl2G6DpsLfpWzFXRwRKSxafYc9AJV0lZ6KMxJHds43jisMvV JanLIXBScLRN2udzGEqwJxIOrJBqqd44dzshYankAdncw0JSQY6G4yAhGSytSv9bNgOzDeKTlAsmV6 6NkSgFh0Oi4iEOc2ROpLbOMk7/0IfTWjwEtrFMc+CFnQjvhR6BQ7Z/NuarIeE9cTd/KsjjJsHf/vvu yE89uLbLzKRtn5yyZsZKUQGm7gFXI37sKp5lcnx8lZe81PNtoBftCEicoN9GK9nWuDtwQgrd9k8tLi qhX2miMaBp7oy6sv9dTtWraYtOdYPx X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Precedence: bulk List-ID: X-Mailing-List: linux-fsdevel@vger.kernel.org Hook up an override for GCS, allowing it to be disabled from the command line by specifying arm64.nogcs in case there are problems. Signed-off-by: Mark Brown --- Documentation/admin-guide/kernel-parameters.txt | 6 ++++++ arch/arm64/kernel/idreg-override.c | 2 ++ 2 files changed, 8 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 0a1731a0f0ef..7afea5f41ce0 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -418,9 +418,15 @@ arm64.nobti [ARM64] Unconditionally disable Branch Target Identification support + arm64.nogcs [ARM64] Unconditionally disable Guarded Control Stack + support + arm64.nomops [ARM64] Unconditionally disable Memory Copy and Memory Set instructions support + arm64.nopauth [ARM64] Unconditionally disable Pointer Authentication + support + arm64.nomte [ARM64] Unconditionally disable Memory Tagging Extension support diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c index 3addc09f8746..cc059ba39d58 100644 --- a/arch/arm64/kernel/idreg-override.c +++ b/arch/arm64/kernel/idreg-override.c @@ -99,6 +99,7 @@ static const struct ftr_set_desc pfr1 __initconst = { .override = &id_aa64pfr1_override, .fields = { FIELD("bt", ID_AA64PFR1_EL1_BT_SHIFT, NULL ), + FIELD("gcs", ID_AA64PFR1_EL1_GCS_SHIFT, NULL), FIELD("mte", ID_AA64PFR1_EL1_MTE_SHIFT, NULL), FIELD("sme", ID_AA64PFR1_EL1_SME_SHIFT, pfr1_sme_filter), {} @@ -178,6 +179,7 @@ static const struct { { "arm64.nosve", "id_aa64pfr0.sve=0" }, { "arm64.nosme", "id_aa64pfr1.sme=0" }, { "arm64.nobti", "id_aa64pfr1.bt=0" }, + { "arm64.nogcs", "id_aa64pfr1.gcs=0" }, { "arm64.nopauth", "id_aa64isar1.gpi=0 id_aa64isar1.gpa=0 " "id_aa64isar1.api=0 id_aa64isar1.apa=0 "