From patchwork Tue Nov 1 10:15:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Colin Vidal X-Patchwork-Id: 9407115 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 169FB60721 for ; Tue, 1 Nov 2016 10:16:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 014E529709 for ; Tue, 1 Nov 2016 10:16:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E907A29710; Tue, 1 Nov 2016 10:16:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 93FCC29709 for ; Tue, 1 Nov 2016 10:16:08 +0000 (UTC) Received: (qmail 19716 invoked by uid 550); 1 Nov 2016 10:16:06 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: kernel-hardening@lists.openwall.com Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 19688 invoked from network); 1 Nov 2016 10:16:06 -0000 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=cvidal.org; h= x-me-sender:x-sasl-enc:message-id:subject:from:to:cc:date :in-reply-to:references:content-type:mime-version :content-transfer-encoding; s=mesmtp; bh=TQgPH0MYxG9FImpps3zjcyL M8Hk=; b=kIZQqjPNSg/BhCK6NWgGuFb8uRo/EQnn7lxdvywlp33eeUnv2g6tesi STt5j7RffbHeVkBFSY4KWTNbcSKXBI4oPw5tKd6amWQVA4f46A3Mx0fKxUdosfUE aUUD+UG3bgiC1VxHqAYBtiRUBrxS6BWk+XJvkZ2V1IDflEB7zIMY= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d= messagingengine.com; h=x-me-sender:x-sasl-enc:message-id:subject :from:to:cc:date:in-reply-to:references:content-type :mime-version:content-transfer-encoding; s=smtpout; bh=TQgPH0MYx G9FImpps3zjcyLM8Hk=; b=cjvtwlO7xwEq41xVZlgon5C11yjfVOjKKKU9UDfWK fKB7yu3skrmX8Qt3bN4YBqlk3F3cEFrvwlcg/3ddL3+kXmaAgNhkK2pY5ui05ehh g02bQBymlTwnA3IeI7ZriQ8TusEh/eOmelwOFQHUpfgqWc8WHHD3t/C5I4OQ3xsl vI= X-ME-Sender: X-Sasl-enc: 7JbhyF6rX6O6JuDeO5UyF2wt/gpXIfkS5u3uaFqFjSBc 1477995353 Message-ID: <1477995348.2236.14.camel@cvidal.org> From: Colin Vidal To: kernel-hardening@lists.openwall.com Cc: keescook@chromium.org, arnd@arndb.de, tglx@linutronix.de, mingo@redhat.com, h.peter.anvin@intel.com, Elena Reshetova , Hans Liljestrand , David Windsor Date: Tue, 01 Nov 2016 11:15:48 +0100 In-Reply-To: <1477914225-11298-2-git-send-email-elena.reshetova@intel.com> References: <1477914225-11298-1-git-send-email-elena.reshetova@intel.com> <1477914225-11298-2-git-send-email-elena.reshetova@intel.com> X-Mailer: Evolution 3.20.5 (3.20.5-1.fc24) Mime-Version: 1.0 Subject: Re: [kernel-hardening] [RFC v3 PATCH 01/13] Add architecture independent hardened atomic base X-Virus-Scanned: ClamAV using ClamSMTP > arch/alpha/include/asm/local.h | 2 + > arch/m32r/include/asm/local.h | 2 + > arch/mips/include/asm/local.h | 2 + > arch/powerpc/include/asm/local.h | 2 + > arch/x86/include/asm/local.h | 2 + > include/asm-generic/local.h | 20 +++ > include/asm-generic/local_wrap.h | 89 ++++++++++ > diff --git a/include/asm-generic/local.h b/include/asm-generic/local.h > index 9ceb03b..e1c81c3 100644 > --- a/include/asm-generic/local.h > +++ b/include/asm-generic/local.h > @@ -4,6 +4,7 @@ > #include > #include > #include > +#include That brake build for any architecture that uses asm-generic/local.h (like ARM v6/v7): asm-generic/local_wrap.h contains typedef local_t local_wrap_t but at this time, local_t is not yet defined, since asm- generic/local_wrap.h is included before the definition of local_t. The following patch fixes that. Thanks Colin diff --git a/include/asm-generic/local.h b/include/asm-generic/local.h index e1c81c3..1828c57 100644 --- a/include/asm-generic/local.h +++ b/include/asm-generic/local.h @@ -4,7 +4,6 @@ #include #include #include -#include /* * A signed long type for operations which are atomic for a single CPU. @@ -48,23 +47,6 @@ typedef struct #define local_add_unless(l, _a, u) atomic_long_add_unless((&(l)->a), (_a), (u)) #define local_inc_not_zero(l) atomic_long_inc_not_zero(&(l)->a) -#define local_read_wrap(l) atomic_long_read_wrap(&(l)->a) -#define local_set_wrap(l,i) atomic_long_set_wrap((&(l)->a),(i)) -#define local_inc_wrap(l) atomic_long_inc_wrap(&(l)->a) -#define local_inc_return_wrap(l) atomic_long_return_wrap(&(l)->a) -#define local_inc_and_test_wrap(l) atomic_long_inc_and_test_wrap(&(l)->a) -#define local_dec_wrap(l) atomic_long_dec_wrap(&(l)->a) -#define local_dec_return_wrap(l) atomic_long_dec_return_wrap(&(l)->a) -#define local_dec_and_test_wrap(l) atomic_long_dec_and_test_wrap(&(l)->a) -#define local_add_wrap(i,l) atomic_long_add_wrap((i),(&(l)->a)) -#define local_add_return_wrap(i, l) atomic_long_add_return_wrap((i), (&(l)->a)) -#define local_sub_wrap(i,l) atomic_long_sub_wrap((i),(&(l)->a)) -#define local_sub_return_wrap(i, l) atomic_long_sub_return_wrap((i), (&(l)->a)) -#define local_sub_and_test_wrap(i, l) atomic_long_sub_and_test_wrap((i), (&(l)->a)) -#define local_cmpxchg_wrap(l, o, n) atomic_long_cmpxchg_wrap((&(l)->a), (o), (n)) -#define local_add_unless_wrap(l, _a, u) atomic_long_add_unless_wrap((&(l)->a), (_a), (u)) -#define local_add_negative_wrap(i, l) atomic_long_add_negative_wrap((i), (&(l)->a)) - /* Non-atomic variants, ie. preemption disabled and won't be touched * in interrupt, etc. Some archs can optimize this case well. */ #define __local_inc(l) local_set((l), local_read(l) + 1) @@ -72,4 +54,6 @@ typedef struct #define __local_add(i,l) local_set((l), local_read(l) + (i)) #define __local_sub(i,l) local_set((l), local_read(l) - (i)) +#include + #endif /* _ASM_GENERIC_LOCAL_H */