From patchwork Tue Nov 1 11:02:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Reshetova, Elena" X-Patchwork-Id: 9407165 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 261C060721 for ; Tue, 1 Nov 2016 11:03:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 28BAB2981B for ; Tue, 1 Nov 2016 11:03:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1D00C2981C; Tue, 1 Nov 2016 11:03:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 484662981D for ; Tue, 1 Nov 2016 11:03:00 +0000 (UTC) Received: (qmail 16222 invoked by uid 550); 1 Nov 2016 11:02:58 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: kernel-hardening@lists.openwall.com Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 16204 invoked from network); 1 Nov 2016 11:02:57 -0000 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,579,1473145200"; d="scan'208";a="1062274489" From: "Reshetova, Elena" To: Colin Vidal , "kernel-hardening@lists.openwall.com" , Hans Liljestrand CC: "keescook@chromium.org" , "arnd@arndb.de" , "tglx@linutronix.de" , "mingo@redhat.com" , "Anvin, H Peter" , David Windsor Thread-Topic: [kernel-hardening] [RFC v3 PATCH 01/13] Add architecture independent hardened atomic base Thread-Index: AQHSM2wkWxVmmAIkC0OZjScqFTH5DqDD8owAgAAE4YA= Date: Tue, 1 Nov 2016 11:02:41 +0000 Message-ID: <2236FBA76BA1254E88B949DDB74E612B41BFACB6@IRSMSX102.ger.corp.intel.com> References: <1477914225-11298-1-git-send-email-elena.reshetova@intel.com> <1477914225-11298-2-git-send-email-elena.reshetova@intel.com> <1477996972.2236.19.camel@cvidal.org> In-Reply-To: <1477996972.2236.19.camel@cvidal.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.182] MIME-Version: 1.0 Subject: RE: [kernel-hardening] [RFC v3 PATCH 01/13] Add architecture independent hardened atomic base X-Virus-Scanned: ClamAV using ClamSMTP >Elena, > diff --git a/include/asm-generic/atomic-long.h > b/include/asm-generic/atomic-long.h > +#ifndef CONFIG_HARDENED_ATOMIC > +#ifndef atomic_read_wrap > +#define atomic_read_wrap(v) atomic_read(v) #endif /* atomic_read_wrap > +*/ #ifndef atomic_set_wrap #define atomic_set_wrap(v, i) > +atomic_set((v), (i)) #endif /* atomic_set_wrap */ #define > +atomic_add_wrap(i, v) atomic_add((i), (v)) #define atomic_sub_wrap(i, > +v) atomic_sub((i), (v)) #define atomic_inc_wrap(v) atomic_inc(v) > +#define atomic_dec_wrap(v) atomic_dec(v) #ifndef > +atomic_add_return_wrap #define atomic_add_return_wrap(i, v) > +atomic_add_return((i), (v)) #endif /* atomic_add_return_wrap */ > +#ifndef atomic_sub_return_wrap #define atomic_sub_return_wrap(i, v) > +atomic_sub_return((i), (v)) #endif /* atomic_sub_return_wrap */ > +#define atoimc_dec_return_wrap(v) atomic_dec_return(v) #ifndef > +atomic_inc_return_wrap #define atomic_inc_return_wrap(v) > +atomic_inc_return(v) #endif /* atomic_inc_return */ #ifndef > +atomic_dec_and_test_wrap #define atomic_dec_and_test_wrap(v) > +atomic_dec_and_test(v) #endif /* atomic_dec_and_test_wrap */ #ifndef > +atomic_inc_and_test_wrap #define atomic_inc_and_test_wrap(v) > +atomic_inc_and_test(v) #endif /* atomic_inc_and_test_wrap */ #define > +atomic_sub_and_test_wrap(i, v) atomic_sub_and_test((v), (i)) #ifndef > +atomic_xchg_wrap #define atomic_xchg_wrap(v, i) atomic_xchg((v), (i)) > +#endif /* atomic_xchg_wrap(v, i) */ #ifndef atomic_cmpxchg_wrap > +#define atomic_cmpxchg_wrap(v, o, n) atomic_cmpxchg((v), (o), (n)) > +#endif /* atomic_cmpxchg_wrap */ #define atomic_add_negative_wrap(i, > +v) atomic_add_negative((i), (v)) #define atomic_add_unless_wrap(v, i, > +j) atomic_add_unless((v), (i), (j)) #endif /* CONFIG_HARDENED_ATOMIC > +*/ > + > #endif /* _ASM_GENERIC_ATOMIC_LONG_H */ > >It seems there are two missing guard here. I've got redefinition errors on ARM (without my prototypes of arm generic atomic64 and arm hardened atomic patches). Yes, I think every function here needs a guard, not sure why it was left this way... I will go ahead and make the change. Hans, please scream if this was intentional for some reason and breaks anything else (I doubt though..) Thank you again! I will update the hardened_atomic_next with fixes, so you can base your patches out of it. >Thanks >Colin diff --git a/include/asm-generic/atomic-long.h b/include/asm- generic/atomic-long.h index 60eb9e0..131f637 100644 --- a/include/asm-generic/atomic-long.h +++ b/include/asm-generic/atomic-long.h @@ -400,14 +400,18 @@ static inline long atomic_long_add_unless_wrap(atomic_long_wrap_t *l, long a, lo  #ifndef atomic_inc_and_test_wrap  #define atomic_inc_and_test_wrap(v) atomic_inc_and_test(v)  #endif /* atomic_inc_and_test_wrap */ +#ifndef atomic_sub_and_test_wrap  #define atomic_sub_and_test_wrap(i, v) atomic_sub_and_test((v), (i)) +#endif /* atomic_sub_and_test_wrap */  #ifndef atomic_xchg_wrap  #define atomic_xchg_wrap(v, i) atomic_xchg((v), (i))  #endif /*  atomic_xchg_wrap(v, i) */  #ifndef atomic_cmpxchg_wrap  #define atomic_cmpxchg_wrap(v, o, n) atomic_cmpxchg((v), (o), (n))  #endif /* atomic_cmpxchg_wrap */ +#ifndef atomic_add_negative_wrap  #define atomic_add_negative_wrap(i, v) atomic_add_negative((i), (v)) +#endif /* atomic_add_negative_wrap */  #define atomic_add_unless_wrap(v, i, j) atomic_add_unless((v), (i), (j))  #endif /* CONFIG_HARDENED_ATOMIC */