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Wed, 6 Apr 2016 15:43:39 +0800 From: Huang Rui To: Guenter Roeck , Jean Delvare CC: , , "Borislav Petkov" , Sherry Hurwitz , Huang Rui Subject: [PATCH v6 3/6] hwmon: (fam15h_power) Add ptsc counter value for accumulated power Date: Wed, 6 Apr 2016 15:44:12 +0800 Message-ID: <1459928655-6071-4-git-send-email-ray.huang@amd.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459928655-6071-1-git-send-email-ray.huang@amd.com> References: <1459928655-6071-1-git-send-email-ray.huang@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:165.204.84.221; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(428002)(199003)(189002)(48376002)(229853001)(33646002)(5001770100001)(5003940100001)(87936001)(86362001)(2906002)(4326007)(19580395003)(189998001)(50466002)(2950100001)(11100500001)(36756003)(586003)(101416001)(50986999)(1220700001)(76176999)(47776003)(1096002)(5003600100002)(81166005)(50226001)(5008740100001)(105586002)(106466001)(92566002)(77096005)(19580405001)(53416004); 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So it picks up the performance timestamp counter value of the first core per compute unit to measure the interval for average power per compute unit. Signed-off-by: Huang Rui Cc: Borislav Petkov --- drivers/hwmon/fam15h_power.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c index 4edbaf0..336d422 100644 --- a/drivers/hwmon/fam15h_power.c +++ b/drivers/hwmon/fam15h_power.c @@ -50,6 +50,7 @@ MODULE_LICENSE("GPL"); #define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a #define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b +#define MSR_F15H_PTSC 0xc0010280 #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4 @@ -65,6 +66,8 @@ struct fam15h_power_data { u64 max_cu_acc_power; /* accumulated power of the compute units */ u64 cu_acc_power[MAX_CUS]; + /* performance timestamp counter */ + u64 cpu_sw_pwr_ptsc[MAX_CUS]; }; static ssize_t show_power(struct device *dev, @@ -145,6 +148,7 @@ static void do_read_registers_on_cu(void *_data) cu = cpu_data(cpu).cpu_core_id; rdmsrl_safe(MSR_F15H_CU_PWR_ACCUMULATOR, &data->cu_acc_power[cu]); + rdmsrl_safe(MSR_F15H_PTSC, &data->cpu_sw_pwr_ptsc[cu]); } /*