| Message ID | 1475853669-22480-7-git-send-email-pantelis.antoniou@konsulko.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
On Fri, Oct 7, 2016 at 5:21 PM, Pantelis Antoniou <pantelis.antoniou@konsulko.com> wrote: > +This is virtual gpio driver, that maps each bit of the I2CS FPGA to > +a gpio. It's used as a compatibility replacement for FRUs that use > +I2CS FPGA to report presence, control and report power status in > +the Juniper's driver infra that uses gpios. Compatible with any I2CS. What does "virtual" mean? I regularly NACK patches that try to shoehorn stuff into GPIO not because they are actually GPIO hardware drivers or general purpose at all, but because it is convenient. Don't do this. > +- i2c-gpio-map: Map of "I2CS register" and "direction". The registers > + are 8 bit wide, each bit of the register is mapped to either > + input or output depending on the bits of the "direction". If > + the bit in the direction is 1, then that bit from the I2CS > + register is mapped to gpio input, otherwise to gpio output. Does this mean that the hardware is synthesized so that some lines are hardwired as input and some hardwired as output? That again does not sound like "general purpose" at all. I think this happens in other hardware and should be a generic binding like gpio-lines-input-only = <0>, <4>; gpio-lines-output-only = <7>, <8>; And no bitmasking, use the local offset, parse and construct the mask. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-hwmon" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/gpio/jnx,gpio-i2cs.txt b/Documentation/devicetree/bindings/gpio/jnx,gpio-i2cs.txt new file mode 100644 index 0000000..835b7fb4 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/jnx,gpio-i2cs.txt @@ -0,0 +1,43 @@ +Juniper I2CS FPGA GPIO presence block + +This is virtual gpio driver, that maps each bit of the I2CS FPGA to +a gpio. It's used as a compatibility replacement for FRUs that use +I2CS FPGA to report presence, control and report power status in +the Juniper's driver infra that uses gpios. Compatible with any I2CS. + +Required properties: + +Required properties: +- compatible: "jnx,gpio-i2cs" + +- reg: + Address on the I2C bus of the I2CS FPGA + +- gpio-controller: Marks the device node as a gpio controller. + +- interrupt-controller: Marks the device node as an interrupt + controller. + +- i2c-gpio-map: Map of "I2CS register" and "direction". The registers + are 8 bit wide, each bit of the register is mapped to either + input or output depending on the bits of the "direction". If + the bit in the direction is 1, then that bit from the I2CS + register is mapped to gpio input, otherwise to gpio output. + +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify the gpio polarity: + 0 = active high + 1 = active low + +Optional properties: + +Example: + +cb0_slave: i2c-slave@54 { + compatible = "jnx,gpio-i2cs"; + reg = <0x54>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + i2c-gpio-map = <0x21 0xff>; /* power status (bit 6) */ +};