From patchwork Mon Nov 20 23:53:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 10067475 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 54A3B601C2 for ; Mon, 20 Nov 2017 23:56:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 42DEF28DBE for ; Mon, 20 Nov 2017 23:56:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 406B929228; Mon, 20 Nov 2017 23:56:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5386C29246 for ; Mon, 20 Nov 2017 23:56:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752033AbdKTXyB (ORCPT ); Mon, 20 Nov 2017 18:54:01 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:34092 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751994AbdKTXx5 (ORCPT ); Mon, 20 Nov 2017 18:53:57 -0500 Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vAKNnRXY090531 for ; Mon, 20 Nov 2017 18:53:56 -0500 Received: from e36.co.us.ibm.com (e36.co.us.ibm.com [32.97.110.154]) by mx0b-001b2d01.pphosted.com with ESMTP id 2ec4g0vd82-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 20 Nov 2017 18:53:56 -0500 Received: from localhost by e36.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 20 Nov 2017 16:53:55 -0700 Received: from b03cxnp07028.gho.boulder.ibm.com (9.17.130.15) by e36.co.us.ibm.com (192.168.1.136) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Mon, 20 Nov 2017 16:53:53 -0700 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp07028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vAKNrqgt62390418; Mon, 20 Nov 2017 16:53:52 -0700 Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C3934BE03B; Mon, 20 Nov 2017 16:53:52 -0700 (MST) Received: from oc3016140333.ibm.com (unknown [9.41.174.252]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP id 21D1FBE039; Mon, 20 Nov 2017 16:53:52 -0700 (MST) From: Eddie James To: linux-kernel@vger.kernel.org Cc: linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux@roeck-us.net, jdelvare@suse.com, corbet@lwn.net, mark.rutland@arm.com, robh+dt@kernel.org, joel@jms.id.au, eajames@linux.vnet.ibm.com, "Edward A. James" Subject: [PATCH v3 05/12] hwmon: Add On-Chip Controller (OCC) hwmon driver Date: Mon, 20 Nov 2017 17:53:34 -0600 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1511222021-562-1-git-send-email-eajames@linux.vnet.ibm.com> References: <1511222021-562-1-git-send-email-eajames@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17112023-0020-0000-0000-00000D0922E6 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008101; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000240; SDB=6.00948826; UDB=6.00479139; IPR=6.00729107; BA=6.00005702; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00018113; XFM=3.00000015; UTC=2017-11-20 23:53:55 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17112023-0021-0000-0000-00005EFCED8C Message-Id: <1511222021-562-6-git-send-email-eajames@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-11-20_12:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1711200318 Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Edward A. James" The OCC is a device embedded on a POWER processor that collects and aggregates sensor data from the processor and system. The OCC can provide the raw sensor data as well as perform thermal and power management on the system. This driver provides a hwmon interface to the OCC from a service processor (e.g. a BMC). The driver supports both POWER8 and POWER9 OCCs. Communications with the POWER8 OCC are established over standard I2C bus. The driver communicates with the POWER9 OCC through the FSI-based OCC driver, which handles the lower-level communication details. This patch lays out the structure of the OCC hwmon driver. There are two platform drivers, one each for P8 and P9 OCCs. These are probed through the I2C tree and the FSI-based OCC driver, respectively. The patch also defines the first common structures and methods between the two OCC versions. Signed-off-by: Edward A. James --- drivers/hwmon/Kconfig | 2 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/occ/Kconfig | 28 +++++++++++++++++++ drivers/hwmon/occ/Makefile | 11 ++++++++ drivers/hwmon/occ/common.c | 44 +++++++++++++++++++++++++++++ drivers/hwmon/occ/common.h | 40 +++++++++++++++++++++++++++ drivers/hwmon/occ/p8_i2c.c | 69 ++++++++++++++++++++++++++++++++++++++++++++++ drivers/hwmon/occ/p9_sbe.c | 66 ++++++++++++++++++++++++++++++++++++++++++++ 8 files changed, 261 insertions(+) create mode 100644 drivers/hwmon/occ/Kconfig create mode 100644 drivers/hwmon/occ/Makefile create mode 100644 drivers/hwmon/occ/common.c create mode 100644 drivers/hwmon/occ/common.h create mode 100644 drivers/hwmon/occ/p8_i2c.c create mode 100644 drivers/hwmon/occ/p9_sbe.c diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 7ad0176..5043a33 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1273,6 +1273,8 @@ config SENSORS_NSA320 This driver can also be built as a module. If so, the module will be called nsa320-hwmon. +source drivers/hwmon/occ/Kconfig + config SENSORS_PCF8591 tristate "Philips PCF8591 ADC/DAC" depends on I2C diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 0fe489f..596828c 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -173,6 +173,7 @@ obj-$(CONFIG_SENSORS_WM831X) += wm831x-hwmon.o obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o obj-$(CONFIG_SENSORS_XGENE) += xgene-hwmon.o +obj-$(CONFIG_SENSORS_OCC) += occ/ obj-$(CONFIG_PMBUS) += pmbus/ ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig new file mode 100644 index 0000000..aa39de9 --- /dev/null +++ b/drivers/hwmon/occ/Kconfig @@ -0,0 +1,28 @@ +# +# On-Chip Controller configuration +# + +config SENSORS_OCC + tristate "POWER On-Chip Controller" + ---help--- + This option enables support for monitoring a variety of system sensors + provided by the On-Chip Controller (OCC) on a POWER processor. + + This driver can also be built as a module. If so, the module will be + called occ-hwmon. + +config SENSORS_OCC_P8_I2C + bool "POWER8 OCC through I2C" + depends on I2C && SENSORS_OCC + ---help--- + This option enables support for monitoring sensors provided by the OCC + on a POWER8 processor. Communications with the OCC are established + through I2C bus. + +config SENSORS_OCC_P9_SBE + bool "POWER9 OCC through SBE" + depends on FSI_OCC && SENSORS_OCC + ---help--- + This option enables support for monitoring sensors provided by the OCC + on a POWER9 processor. Communications with the OCC are established + through SBE engine on an FSI bus. diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile new file mode 100644 index 0000000..ab5c3e9 --- /dev/null +++ b/drivers/hwmon/occ/Makefile @@ -0,0 +1,11 @@ +occ-hwmon-objs := common.o + +ifeq ($(CONFIG_SENSORS_OCC_P9_SBE), y) +occ-hwmon-objs += p9_sbe.o +endif + +ifeq ($(CONFIG_SENSORS_OCC_P8_I2C), y) +occ-hwmon-objs += p8_i2c.o +endif + +obj-$(CONFIG_SENSORS_OCC) += occ-hwmon.o diff --git a/drivers/hwmon/occ/common.c b/drivers/hwmon/occ/common.c new file mode 100644 index 0000000..92f06ae --- /dev/null +++ b/drivers/hwmon/occ/common.c @@ -0,0 +1,44 @@ +/* + * Copyright 2017 IBM Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include + +#include "common.h" + +static int occ_poll(struct occ *occ) +{ + u16 checksum = occ->poll_cmd_data + 1; + u8 cmd[8]; + + /* big endian */ + cmd[0] = 0; /* sequence number */ + cmd[1] = 0; /* cmd type */ + cmd[2] = 0; /* data length msb */ + cmd[3] = 1; /* data length lsb */ + cmd[4] = occ->poll_cmd_data; /* data */ + cmd[5] = checksum >> 8; /* checksum msb */ + cmd[6] = checksum & 0xFF; /* checksum lsb */ + cmd[7] = 0; + + return occ->send_cmd(occ, cmd); +} + +int occ_setup(struct occ *occ, const char *name) +{ + int rc; + + rc = occ_poll(occ); + if (rc < 0) { + dev_err(occ->bus_dev, "failed to get OCC poll response: %d\n", + rc); + return rc; + } + + return 0; +} diff --git a/drivers/hwmon/occ/common.h b/drivers/hwmon/occ/common.h new file mode 100644 index 0000000..705dfe3 --- /dev/null +++ b/drivers/hwmon/occ/common.h @@ -0,0 +1,40 @@ +/* + * Copyright 2017 IBM Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef OCC_COMMON_H +#define OCC_COMMON_H + +struct device; + +#define OCC_RESP_DATA_BYTES 4089 + +/* Same response format for all OCC versions. + * Allocate the largest possible response. + */ +struct occ_response { + u8 seq_no; + u8 cmd_type; + u8 return_status; + __be16 data_length; + u8 data[OCC_RESP_DATA_BYTES]; + __be16 checksum; +} __packed; + +struct occ { + struct device *bus_dev; + + struct occ_response resp; + + u8 poll_cmd_data; /* to perform OCC poll command */ + int (*send_cmd)(struct occ *occ, u8 *cmd); +}; + +int occ_setup(struct occ *occ, const char *name); + +#endif /* OCC_COMMON_H */ diff --git a/drivers/hwmon/occ/p8_i2c.c b/drivers/hwmon/occ/p8_i2c.c new file mode 100644 index 0000000..025471f --- /dev/null +++ b/drivers/hwmon/occ/p8_i2c.c @@ -0,0 +1,69 @@ +/* + * Copyright 2017 IBM Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include + +#include "common.h" + +struct p8_i2c_occ { + struct occ occ; + struct i2c_client *client; +}; + +#define to_p8_i2c_occ(x) container_of((x), struct p8_i2c_occ, occ) + +static int p8_i2c_occ_send_cmd(struct occ *occ, u8 *cmd) +{ + return -EOPNOTSUPP; +} + +static int p8_i2c_occ_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct occ *occ; + struct p8_i2c_occ *p8_i2c_occ = devm_kzalloc(&client->dev, + sizeof(*p8_i2c_occ), + GFP_KERNEL); + if (!p8_i2c_occ) + return -ENOMEM; + + p8_i2c_occ->client = client; + occ = &p8_i2c_occ->occ; + occ->bus_dev = &client->dev; + dev_set_drvdata(&client->dev, occ); + + occ->poll_cmd_data = 0x10; /* P8 OCC poll data */ + occ->send_cmd = p8_i2c_occ_send_cmd; + + return occ_setup(occ, "p8_occ"); +} + +static const struct of_device_id p8_i2c_occ_of_match[] = { + { .compatible = "ibm,p8-occ-hwmon" }, + {} +}; +MODULE_DEVICE_TABLE(of, p8_i2c_occ_of_match); + +static struct i2c_driver p8_i2c_occ_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "occ-hwmon", + .of_match_table = p8_i2c_occ_of_match, + }, + .probe = p8_i2c_occ_probe, +}; + +module_i2c_driver(p8_i2c_occ_driver); + +MODULE_AUTHOR("Eddie James "); +MODULE_DESCRIPTION("BMC P8 OCC hwmon driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/hwmon/occ/p9_sbe.c b/drivers/hwmon/occ/p9_sbe.c new file mode 100644 index 0000000..58c3bb2 --- /dev/null +++ b/drivers/hwmon/occ/p9_sbe.c @@ -0,0 +1,66 @@ +/* + * Copyright 2017 IBM Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include + +#include "common.h" + +struct p9_sbe_occ { + struct occ occ; + struct device *sbe; +}; + +#define to_p9_sbe_occ(x) container_of((x), struct p9_sbe_occ, occ) + +static int p9_sbe_occ_send_cmd(struct occ *occ, u8 *cmd) +{ + return -EOPNOTSUPP; +} + +static int p9_sbe_occ_probe(struct platform_device *pdev) +{ + struct occ *occ; + struct p9_sbe_occ *p9_sbe_occ = devm_kzalloc(&pdev->dev, + sizeof(*p9_sbe_occ), + GFP_KERNEL); + if (!p9_sbe_occ) + return -ENOMEM; + + p9_sbe_occ->sbe = pdev->dev.parent; + occ = &p9_sbe_occ->occ; + occ->bus_dev = &pdev->dev; + platform_set_drvdata(pdev, occ); + + occ->poll_cmd_data = 0x20; /* P9 OCC poll data */ + occ->send_cmd = p9_sbe_occ_send_cmd; + + return occ_setup(occ, "p9_occ"); +} + +static const struct of_device_id p9_sbe_occ_of_match[] = { + { .compatible = "ibm,p9-occ-hwmon" }, + { }, +}; + +static struct platform_driver p9_sbe_occ_driver = { + .driver = { + .name = "occ-hwmon", + .of_match_table = p9_sbe_occ_of_match, + }, + .probe = p9_sbe_occ_probe, +}; + +module_platform_driver(p9_sbe_occ_driver); + +MODULE_AUTHOR("Eddie James "); +MODULE_DESCRIPTION("BMC P9 OCC hwmon driver"); +MODULE_LICENSE("GPL");