diff mbox series

[v4,07/21] hwmon: (mr75203) enable polling for all VM channels

Message ID 20220906083356.21067-8-farbere@amazon.com (mailing list archive)
State Superseded
Headers show
Series Variety of fixes and new features for mr75203 driver | expand

Commit Message

Farber, Eliav Sept. 6, 2022, 8:33 a.m. UTC 
Configure ip-polling register to enable polling for all voltage monitor
channels.
This enables reading the voltage values for all inputs other than just
input 0.

Signed-off-by: Eliav Farber <farbere@amazon.com>
---
V3 -> V2:
- Move configuration of ip-polling register from previous patch to a
  separate commit.

V4 -> V3:
- Replace GENMASK(pvt->c_num - 1, 0)  with (BIT(pvt->c_num) - 1).

 drivers/hwmon/mr75203.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)
diff mbox series

Patch

diff --git a/drivers/hwmon/mr75203.c b/drivers/hwmon/mr75203.c
index 69f38c05b02d..5f2b11a2bf5f 100644
--- a/drivers/hwmon/mr75203.c
+++ b/drivers/hwmon/mr75203.c
@@ -388,6 +388,19 @@  static int pvt_init(struct pvt_device *pvt)
 		if (ret)
 			return ret;
 
+		val = (BIT(pvt->c_num) - 1) | VM_CH_INIT |
+		      IP_POLL << SDIF_ADDR_SFT | SDIF_WRN_W | SDIF_PROG;
+		ret = regmap_write(v_map, SDIF_W, val);
+		if (ret < 0)
+			return ret;
+
+		ret = regmap_read_poll_timeout(v_map, SDIF_STAT,
+					       val, !(val & SDIF_BUSY),
+					       PVT_POLL_DELAY_US,
+					       PVT_POLL_TIMEOUT_US);
+		if (ret)
+			return ret;
+
 		val = CFG1_VOL_MEAS_MODE | CFG1_PARALLEL_OUT |
 		      CFG1_14_BIT | IP_CFG << SDIF_ADDR_SFT |
 		      SDIF_WRN_W | SDIF_PROG;