From patchwork Thu Sep 8 15:24:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Farber, Eliav" X-Patchwork-Id: 12970264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C789C6FA89 for ; Thu, 8 Sep 2022 15:25:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231947AbiIHPZb (ORCPT ); Thu, 8 Sep 2022 11:25:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231589AbiIHPZZ (ORCPT ); Thu, 8 Sep 2022 11:25:25 -0400 Received: from smtp-fw-6001.amazon.com (smtp-fw-6001.amazon.com [52.95.48.154]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 28D209D11C; Thu, 8 Sep 2022 08:25:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1662650724; x=1694186724; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=P6C4FP/poRfQEv3vtIlJikPvODV2zGpRCCadaRYkOW4=; b=OtRv0mNzKVv7YYsWwsu9cy14MdPMO+mL2ujTA2STr8ETuS76RLrLA/4p y9xIGPhqj65r0Nps74Zquyjhg7B2ujeWvVxTw4pJLtDiQrmRFZFNlD2X9 fYFp5wHQbU7WHE3p3k57QSCXDbyZf4zhwOyjoxj/XnF9K/cjVP/0BzfhK w=; Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO email-inbound-relay-iad-1d-7a21ed79.us-east-1.amazon.com) ([10.43.8.2]) by smtp-border-fw-6001.iad6.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Sep 2022 15:25:11 +0000 Received: from EX13MTAUWB001.ant.amazon.com (iad12-ws-svc-p26-lb9-vlan3.iad.amazon.com [10.40.163.38]) by email-inbound-relay-iad-1d-7a21ed79.us-east-1.amazon.com (Postfix) with ESMTPS id D785E2200A9; Thu, 8 Sep 2022 15:25:08 +0000 (UTC) Received: from EX19D013UWB002.ant.amazon.com (10.13.138.21) by EX13MTAUWB001.ant.amazon.com (10.43.161.207) with Microsoft SMTP Server (TLS) id 15.0.1497.38; Thu, 8 Sep 2022 15:24:52 +0000 Received: from EX13MTAUWB001.ant.amazon.com (10.43.161.207) by EX19D013UWB002.ant.amazon.com (10.13.138.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1118.12; Thu, 8 Sep 2022 15:24:52 +0000 Received: from dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (172.19.116.181) by mail-relay.amazon.com (10.43.161.249) with Microsoft SMTP Server id 15.0.1497.38 via Frontend Transport; Thu, 8 Sep 2022 15:24:52 +0000 Received: by dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (Postfix, from userid 14301484) id 807464D59; Thu, 8 Sep 2022 15:24:49 +0000 (UTC) From: Eliav Farber To: , , , , , , , , CC: , , , "Andy Shevchenko" Subject: [PATCH v5 06/21] hwmon: (mr75203) enable polling for all VM channels Date: Thu, 8 Sep 2022 15:24:34 +0000 Message-ID: <20220908152449.35457-7-farbere@amazon.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220908152449.35457-1-farbere@amazon.com> References: <20220908152449.35457-1-farbere@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Configure ip-polling register to enable polling for all voltage monitor channels. This enables reading the voltage values for all inputs other than just input 0. Fixes: 9d823351a337 ("hwmon: Add hardware monitoring driver for Moortec MR75203 PVT controller") Signed-off-by: Eliav Farber Reviewed-by: Andy Shevchenko --- V3 -> V2: - Move configuration of ip-polling register from previous patch to a separate commit. V4 -> V3: - Replace GENMASK(pvt->c_num - 1, 0) with (BIT(pvt->c_num) - 1). drivers/hwmon/mr75203.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/hwmon/mr75203.c b/drivers/hwmon/mr75203.c index 87a14713e124..41e3d3b54baf 100644 --- a/drivers/hwmon/mr75203.c +++ b/drivers/hwmon/mr75203.c @@ -398,6 +398,19 @@ static int pvt_init(struct pvt_device *pvt) if (ret) return ret; + val = (BIT(pvt->c_num) - 1) | VM_CH_INIT | + IP_POLL << SDIF_ADDR_SFT | SDIF_WRN_W | SDIF_PROG; + ret = regmap_write(v_map, SDIF_W, val); + if (ret < 0) + return ret; + + ret = regmap_read_poll_timeout(v_map, SDIF_STAT, + val, !(val & SDIF_BUSY), + PVT_POLL_DELAY_US, + PVT_POLL_TIMEOUT_US); + if (ret) + return ret; + val = CFG1_VOL_MEAS_MODE | CFG1_PARALLEL_OUT | CFG1_14_BIT | IP_CFG << SDIF_ADDR_SFT | SDIF_WRN_W | SDIF_PROG;