From patchwork Fri Oct 14 09:01:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhang Rui X-Patchwork-Id: 13006839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1DF32C4332F for ; Fri, 14 Oct 2022 08:59:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230115AbiJNI7a (ORCPT ); Fri, 14 Oct 2022 04:59:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230100AbiJNI7T (ORCPT ); Fri, 14 Oct 2022 04:59:19 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C254C15626F; Fri, 14 Oct 2022 01:59:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1665737957; x=1697273957; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=OTbXSwCtr2+jExMCyp3avWcsWjg4MvtgqQG+iqEBjmI=; b=W+Jxm+eITlG7gqsUpl05SFdP4XCb+AQ8nY4tCK+0ErE27cK/bm6Jhfab lYZ8libwBUKnJ414ApFitSSGmW5raAGlBU8qFJFq6vbNxINb9UymBmrz5 1J3WiYXKE5Ddb8nRYKGq+A8cTTJqZ0OsHSi6oda1Dm+BXTn9ZYB2gbiEf HRNlP7YX+V6YOQFQmu/cUOzP+du7l4U+61k4nL1FEq0Pqppzkycg5xBRd Y1EACZXyiyol3Pgbs7DNzILFqNSFC6Dr0NgfaZNbQ48YeM5InR4g+2twB i07YcgBniZOX72BLFYyR5UYjC+w139SocJ2aqCHzcO9wuzAvbpfqJPsHr Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="391635386" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="391635386" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2022 01:59:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="696234537" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="696234537" Received: from power-sh.sh.intel.com ([10.239.183.122]) by fmsmga004.fm.intel.com with ESMTP; 14 Oct 2022 01:59:14 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH V4 3/4] x86/topology: Fix multiple packages shown on a single-package system Date: Fri, 14 Oct 2022 17:01:46 +0800 Message-Id: <20221014090147.1836-4-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221014090147.1836-1-rui.zhang@intel.com> References: <20221014090147.1836-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org CPUID.1F/B does not emumerate Package level explicitly, instead, all the APIC-ID bits above the enumerated levels are assumed to be package ID bits. Current code gets package ID by shifting out all the APIC-ID bits that Linux supports, rather than shifting out all the APIC-ID bits that CPUID.1F enumerates. This introduces problems when CPUID.1F enumerates a level that Linux does not support. For example, on a single package AlderLake-N, there are 2 Ecore Modules with 4 atom cores in each module. Linux does not support the Module level and interprets the Module ID bits as package ID and erroneously reports a multi module system as a multi-package system. Fix this by using APIC-ID bits above all the CPUID.1F enumerated levels as package ID. Fixes: 7745f03eb395 ("x86/topology: Add CPUID.1F multi-die/package support") Cc: stable@vger.kernel.org Suggested-by: Len Brown Signed-off-by: Zhang Rui Reviewed-by: Len Brown --- arch/x86/kernel/cpu/topology.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c index 132a2de44d2f..f7592814e5d5 100644 --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -96,6 +96,7 @@ int detect_extended_topology(struct cpuinfo_x86 *c) unsigned int ht_mask_width, core_plus_mask_width, die_plus_mask_width; unsigned int core_select_mask, core_level_siblings; unsigned int die_select_mask, die_level_siblings; + unsigned int pkg_mask_width; bool die_level_present = false; int leaf; @@ -111,10 +112,10 @@ int detect_extended_topology(struct cpuinfo_x86 *c) core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx); core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); die_level_siblings = LEVEL_MAX_SIBLINGS(ebx); - die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); + pkg_mask_width = die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); sub_index = 1; - do { + while (true) { cpuid_count(leaf, sub_index, &eax, &ebx, &ecx, &edx); /* @@ -132,8 +133,13 @@ int detect_extended_topology(struct cpuinfo_x86 *c) die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); } + if (LEAFB_SUBTYPE(ecx) != INVALID_TYPE) + pkg_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); + else + break; + sub_index++; - } while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE); + } core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width; die_select_mask = (~(-1 << die_plus_mask_width)) >> @@ -148,7 +154,7 @@ int detect_extended_topology(struct cpuinfo_x86 *c) } c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, - die_plus_mask_width); + pkg_mask_width); /* * Reinit the apicid, now that we have extended initial_apicid. */