| Message ID | 20240412032559.3352846-1-Delphine_CC_Chiu@wiwynn.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [v1] hwmon: max31790: revise the scale to write pwm | expand |
On Fri, Apr 12, 2024 at 11:25:58AM +0800, Delphine CC Chiu wrote: > Since the value for PWMOUT Target Duty Cycle register is a 9 bit > left-justified value that ranges from 0 to 511 and is contained in 2 > bytes. > > There is an issue that the LSB of the 9 bit would always be zero if it > just left shift 8 bit for the value that write to PWMOUT Target Duty > Cycle register. > > Therefore, revise the scale of the value that was writen to pwm input > from 255 to 511 and modify the value to left-justified value. > The only difference is that it writes 511 instead of 510. All other values are the same. I am not sure if that is really worth the trouble. It would have made a little more sense to me if you had used DIV_ROUND_CLOSEST(), but you didn't do that. As it is, I really don't understand the point. If it is really important to write 511 instead of 510, the commit description should explain that and not talk about the last bit always being zero (which it still is after this patch except, again, when writing 511 instead of 510). Thanks, Guenter > Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> > --- > drivers/hwmon/max31790.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/hwmon/max31790.c b/drivers/hwmon/max31790.c > index 3dc95196b229..bd201191da1c 100644 > --- a/drivers/hwmon/max31790.c > +++ b/drivers/hwmon/max31790.c > @@ -49,6 +49,9 @@ > > #define NR_CHANNEL 6 > > +#define PWM_INPUT_SCALE 255 > +#define MAX31790_REG_PWMOUT_SCALE 511 > + > /* > * Client data (each client gets its own) > */ > @@ -343,10 +346,12 @@ static int max31790_write_pwm(struct device *dev, u32 attr, int channel, > err = -EINVAL; > break; > } > + > + val = val * MAX31790_REG_PWMOUT_SCALE / PWM_INPUT_SCALE; > data->valid = false; > err = i2c_smbus_write_word_swapped(client, > MAX31790_REG_PWMOUT(channel), > - val << 8); > + val << 7); > break; > case hwmon_pwm_enable: > fan_config = data->fan_config[channel]; > -- > 2.25.1 >
> -----Original Message----- > From: Guenter Roeck <groeck7@gmail.com> On Behalf Of Guenter Roeck > Sent: Friday, April 12, 2024 9:03 PM > To: Delphine_CC_Chiu/WYHQ/Wiwynn <Delphine_CC_Chiu@wiwynn.com> > Cc: patrick@stwcx.xyz; Jean Delvare <jdelvare@suse.com>; > linux-hwmon@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH v1] hwmon: max31790: revise the scale to write pwm > > Security Reminder: Please be aware that this email is sent by an external > sender. > > On Fri, Apr 12, 2024 at 11:25:58AM +0800, Delphine CC Chiu wrote: > > Since the value for PWMOUT Target Duty Cycle register is a 9 bit > > left-justified value that ranges from 0 to 511 and is contained in 2 > > bytes. > > > > There is an issue that the LSB of the 9 bit would always be zero if it > > just left shift 8 bit for the value that write to PWMOUT Target Duty > > Cycle register. > > > > Therefore, revise the scale of the value that was writen to pwm input > > from 255 to 511 and modify the value to left-justified value. > > > > The only difference is that it writes 511 instead of 510. All other values are the > same. I am not sure if that is really worth the trouble. It would have made a > little more sense to me if you had used DIV_ROUND_CLOSEST(), but you didn't > do that. As it is, I really don't understand the point. If it is really important to > write 511 instead of 510, the commit description should explain that and not > talk about the last bit always being zero (which it still is after this patch except, > again, when writing 511 instead of 510). > > Thanks, > Guenter > Hi Guenter, Thanks for your reviewing. I'll revise the code to use DIV_ROUND_CLOSEST(). The reason why we add this patch is that we saw an issue that the PWM signal we get with oscilloscope would not be on consistently if we set PWM to 100% to the driver, which would fail our hardware testing. I'll describe more detail in the commit message. Thanks.
diff --git a/drivers/hwmon/max31790.c b/drivers/hwmon/max31790.c index 3dc95196b229..bd201191da1c 100644 --- a/drivers/hwmon/max31790.c +++ b/drivers/hwmon/max31790.c @@ -49,6 +49,9 @@ #define NR_CHANNEL 6 +#define PWM_INPUT_SCALE 255 +#define MAX31790_REG_PWMOUT_SCALE 511 + /* * Client data (each client gets its own) */ @@ -343,10 +346,12 @@ static int max31790_write_pwm(struct device *dev, u32 attr, int channel, err = -EINVAL; break; } + + val = val * MAX31790_REG_PWMOUT_SCALE / PWM_INPUT_SCALE; data->valid = false; err = i2c_smbus_write_word_swapped(client, MAX31790_REG_PWMOUT(channel), - val << 8); + val << 7); break; case hwmon_pwm_enable: fan_config = data->fan_config[channel];
Since the value for PWMOUT Target Duty Cycle register is a 9 bit left-justified value that ranges from 0 to 511 and is contained in 2 bytes. There is an issue that the LSB of the 9 bit would always be zero if it just left shift 8 bit for the value that write to PWMOUT Target Duty Cycle register. Therefore, revise the scale of the value that was writen to pwm input from 255 to 511 and modify the value to left-justified value. Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> --- drivers/hwmon/max31790.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)