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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jul 2024 08:11:03.3027 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d5bfae46-7838-4643-c5ca-08dca6380058 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A348.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6903 APML mailbox protocol returns additional error codes written by SMU firmware in the out-bound register 0x37. These errors include, invalid core, message not supported over platform and others. This additional error codes can be used to provide more details to userspace. Signed-off-by: Akshay Gupta Reviewed-by: Naveen Krishna Chatradhi --- Changes since v1: - bifurcated from previous patch 5 drivers/misc/amd-sbi/rmi-core.c | 12 +++++++++++- include/uapi/misc/amd-apml.h | 4 ++++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/misc/amd-sbi/rmi-core.c b/drivers/misc/amd-sbi/rmi-core.c index e7778749940e..01c3a6c9c15c 100644 --- a/drivers/misc/amd-sbi/rmi-core.c +++ b/drivers/misc/amd-sbi/rmi-core.c @@ -27,13 +27,15 @@ int rmi_mailbox_xfer(struct sbrmi_data *data, struct apml_message *msg) { - unsigned int bytes; + unsigned int bytes, ec; int i, ret, retry = 10; int sw_status; u8 byte; mutex_lock(&data->lock); + msg->fw_ret_code = 0; + /* Indicate firmware a command is to be serviced */ ret = regmap_write(data->regmap, SBRMI_INBNDMSG7, START_CMD); if (ret < 0) @@ -85,6 +87,9 @@ int rmi_mailbox_xfer(struct sbrmi_data *data, goto exit_unlock; } + ret = regmap_read(data->regmap, SBRMI_OUTBNDMSG7, &ec); + if (ret || ec) + goto exit_clear_alert; /* * For a read operation, the initiator (BMC) reads the firmware * response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] @@ -100,12 +105,17 @@ int rmi_mailbox_xfer(struct sbrmi_data *data, } } +exit_clear_alert: /* * BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the * ALERT to initiator */ ret = regmap_write(data->regmap, SBRMI_STATUS, sw_status | SW_ALERT_MASK); + if (ec) { + ret = -EPROTOTYPE; + msg->fw_ret_code = ec; + } exit_unlock: mutex_unlock(&data->lock); return ret; diff --git a/include/uapi/misc/amd-apml.h b/include/uapi/misc/amd-apml.h index 81e505eccac4..06e93a6a8f4b 100644 --- a/include/uapi/misc/amd-apml.h +++ b/include/uapi/misc/amd-apml.h @@ -38,6 +38,10 @@ struct apml_message { __u32 mb_in[2]; __u8 reg_in[8]; } data_in; + /* + * Error code is returned in case of soft mailbox + */ + __u32 fw_ret_code; } __attribute__((packed)); /* ioctl command for mailbox msgs using generic _IOWR */