mbox series

[v2,0/6] Introduce initial support for the AMD I3C (non-HCI) to DW driver

Message ID 20241023055118.1400286-1-Shyam-sundar.S-k@amd.com (mailing list archive)
Headers show
Series Introduce initial support for the AMD I3C (non-HCI) to DW driver | expand

Message

Shyam Sundar S K Oct. 23, 2024, 5:51 a.m. UTC
The AMD EPYC platform design has DIMMs connected over the I3C bus, with
each DIMM containing three components: SPD, PMIC, and RCD.

To access component-specific information within the DIMMs, such as initial
dynamic address, static address, and provisional ID, ACPI support is
necessary for the I3C core. This requires adding ACPI binding to the
dw-i3c-master driver and retrieving slave information from the AMD ASL.

Currently, the code is closely tied to dt-bindings. This initial set aims
to decouple some of these bindings by adding the AMD-specific _HID,
enabling the current driver to support ACPI-enabled x86 systems.

In this series, support for following features has been added.
- X86/ACPI support to i3c core
- Support for SETAASA CCC command
- Add routines to plugin a SPD device to the i3c bus
- Workaround for AMD hardware
- Add dw-i3c-master driver with ACPI bindings


v2:
----
 - Address LKP reports issues

Shyam Sundar S K (6):
  i3c: dw: Add support for AMDI0015 ACPI ID
  i3c: dw: Use IRQF_SHARED flag for dw-i3c-master
  i3c: master: Add ACPI support to i3c subsystem
  i3c: master: Add a routine to include the I3C SPD device
  i3c: master: Add support for SETAASA CCC
  i3c: dw: Add quirk to address OD/PP timing issue on AMD platform

 drivers/i3c/internals.h            |   2 +
 drivers/i3c/master.c               | 157 ++++++++++++++++++++++++++++-
 drivers/i3c/master/dw-i3c-master.c |  44 +++++++-
 drivers/i3c/master/dw-i3c-master.h |   1 +
 include/linux/i3c/ccc.h            |   1 +
 include/linux/i3c/master.h         |   2 +
 6 files changed, 205 insertions(+), 2 deletions(-)

Comments

Shyam Sundar S K Oct. 29, 2024, 3:15 p.m. UTC | #1
Hi Jarkko,

On 10/23/2024 11:21, Shyam Sundar S K wrote:
> The AMD EPYC platform design has DIMMs connected over the I3C bus, with
> each DIMM containing three components: SPD, PMIC, and RCD.
> 
> To access component-specific information within the DIMMs, such as initial
> dynamic address, static address, and provisional ID, ACPI support is
> necessary for the I3C core. This requires adding ACPI binding to the
> dw-i3c-master driver and retrieving slave information from the AMD ASL.
> 
> Currently, the code is closely tied to dt-bindings. This initial set aims
> to decouple some of these bindings by adding the AMD-specific _HID,
> enabling the current driver to support ACPI-enabled x86 systems.
> 
> In this series, support for following features has been added.
> - X86/ACPI support to i3c core
> - Support for SETAASA CCC command
> - Add routines to plugin a SPD device to the i3c bus
> - Workaround for AMD hardware
> - Add dw-i3c-master driver with ACPI bindings
> 
> 

Any feedback on this series, please?

Thanks,
Shyam

> v2:
> ----
>  - Address LKP reports issues
> 
> Shyam Sundar S K (6):
>   i3c: dw: Add support for AMDI0015 ACPI ID
>   i3c: dw: Use IRQF_SHARED flag for dw-i3c-master
>   i3c: master: Add ACPI support to i3c subsystem
>   i3c: master: Add a routine to include the I3C SPD device
>   i3c: master: Add support for SETAASA CCC
>   i3c: dw: Add quirk to address OD/PP timing issue on AMD platform
> 
>  drivers/i3c/internals.h            |   2 +
>  drivers/i3c/master.c               | 157 ++++++++++++++++++++++++++++-
>  drivers/i3c/master/dw-i3c-master.c |  44 +++++++-
>  drivers/i3c/master/dw-i3c-master.h |   1 +
>  include/linux/i3c/ccc.h            |   1 +
>  include/linux/i3c/master.h         |   2 +
>  6 files changed, 205 insertions(+), 2 deletions(-)
>
Jarkko Nikula Nov. 4, 2024, 1:37 p.m. UTC | #2
On 10/29/24 5:15 PM, Shyam Sundar S K wrote:
> Hi Jarkko,
> 
> On 10/23/2024 11:21, Shyam Sundar S K wrote:
>> The AMD EPYC platform design has DIMMs connected over the I3C bus, with
>> each DIMM containing three components: SPD, PMIC, and RCD.
>>
>> To access component-specific information within the DIMMs, such as initial
>> dynamic address, static address, and provisional ID, ACPI support is
>> necessary for the I3C core. This requires adding ACPI binding to the
>> dw-i3c-master driver and retrieving slave information from the AMD ASL.
>>
>> Currently, the code is closely tied to dt-bindings. This initial set aims
>> to decouple some of these bindings by adding the AMD-specific _HID,
>> enabling the current driver to support ACPI-enabled x86 systems.
>>
>> In this series, support for following features has been added.
>> - X86/ACPI support to i3c core
>> - Support for SETAASA CCC command
>> - Add routines to plugin a SPD device to the i3c bus
>> - Workaround for AMD hardware
>> - Add dw-i3c-master driver with ACPI bindings
>>
>>
> 
> Any feedback on this series, please?
> 
Sorry, I thought I was accidentally CC'ed to the series :-)

Since I went now reading the series I'll some comments.