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[0/2] iio: sx9324: Support CS idle mode

Message ID 20220503004156.3559940-1-swboyd@chromium.org (mailing list archive)
Headers show
Series iio: sx9324: Support CS idle mode | expand

Message

Stephen Boyd May 3, 2022, 12:41 a.m. UTC 
I need one more property to set another regsiter field for 
how to configure the CS pins during idle and sleep modes. This is based
on the latest patch series from Gwendal[1]

Stephen Boyd (2):
  dt-bindings: iio: sx9324: Add CS idle/sleep mode
  iio: sx9324: Add setting for CS idle mode

 .../bindings/iio/proximity/semtech,sx9324.yaml   |  8 ++++++++
 drivers/iio/proximity/sx9324.c                   | 16 ++++++++++++++++
 2 files changed, 24 insertions(+)

[1] https://lore.kernel.org/all/20220429220144.1476049-1-gwendal@chromium.org/

base-commit: d79478a79cfa393cde46bccb05d52fc7d875d2e2
prerequisite-patch-id: 05986765e921df4c9725d10a3f51e68b0b5cc211
prerequisite-patch-id: 5e47b28af046dce1eb7d7ca492c466df0f30e07c
prerequisite-patch-id: adb59d1a14b74ddfe02c442da8bcca04765e7d15
prerequisite-patch-id: ec6069ee00463db27826962537ff880e69522f70
prerequisite-patch-id: e40f2a3048da2ff28bb426b85e41d277f29f18ef
prerequisite-patch-id: 82077662b97c09014c5b291fe5a42938a29ddbcd
prerequisite-patch-id: d02f0ec3be1fa9cdbf02a22c700982008d0550bd
prerequisite-patch-id: a02a8faefc5b7b68b99c0cc326973948c9356b60
prerequisite-patch-id: 522c808e4b8bf99b8404c01d495526a685e5b97a

Comments

Gwendal Grignou May 3, 2022, 12:50 a.m. UTC | #1 
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>

On Mon, May 2, 2022 at 5:42 PM Stephen Boyd <swboyd@chromium.org> wrote:
>
> Based on device tree setting, set the CS idle mode.
>
> Cc: Gwendal Grignou <gwendal@chromium.org>
> Signed-off-by: Stephen Boyd <swboyd@chromium.org>
> ---
>  drivers/iio/proximity/sx9324.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/drivers/iio/proximity/sx9324.c b/drivers/iio/proximity/sx9324.c
> index 7f367f63e362..79683f0d4e9a 100644
> --- a/drivers/iio/proximity/sx9324.c
> +++ b/drivers/iio/proximity/sx9324.c
> @@ -57,6 +57,11 @@
>         GENMASK(SX9324_REG_AFE_CTRL0_RINT_SHIFT + 1, \
>                 SX9324_REG_AFE_CTRL0_RINT_SHIFT)
>  #define SX9324_REG_AFE_CTRL0_RINT_LOWEST       0x00
> +#define SX9324_REG_AFE_CTRL0_CSIDLE_SHIFT      4
> +#define SX9324_REG_AFE_CTRL0_CSIDLE_MASK \
> +       GENMASK(SX9324_REG_AFE_CTRL0_CSIDLE_SHIFT + 1, \
> +               SX9324_REG_AFE_CTRL0_CSIDLE_SHIFT)
> +#define SX9324_REG_AFE_CTRL0_RINT_LOWEST       0x00
>  #define SX9324_REG_AFE_CTRL1           0x21
>  #define SX9324_REG_AFE_CTRL2           0x22
>  #define SX9324_REG_AFE_CTRL3           0x23
> @@ -872,6 +877,8 @@ sx9324_get_default_reg(struct device *dev, int idx,
>  {
>         static const char * const sx9324_rints[] = { "lowest", "low", "high",
>                 "highest" };
> +       static const char * const sx9324_csidle[] = { "hz", "hz", "gnd",
> +               "vdd" };
>  #define SX9324_PIN_DEF "semtech,ph0-pin"
>  #define SX9324_RESOLUTION_DEF "semtech,ph01-resolution"
>  #define SX9324_PROXRAW_DEF "semtech,ph01-proxraw-strength"
> @@ -901,6 +908,15 @@ sx9324_get_default_reg(struct device *dev, int idx,
>                 reg_def->def = raw;
>                 break;
>         case SX9324_REG_AFE_CTRL0:
> +               ret = device_property_read_string(dev,
> +                               "semtech,cs-idle-sleep", &res);
> +               if (!ret)
> +                       ret = match_string(sx9324_csidle, ARRAY_SIZE(sx9324_csidle), res);
> +               if (ret >= 0) {
> +                       reg_def->def &= ~SX9324_REG_AFE_CTRL0_CSIDLE_MASK;
> +                       reg_def->def |= ret << SX9324_REG_AFE_CTRL0_CSIDLE_SHIFT;
> +               }
> +
>                 ret = device_property_read_string(dev,
>                                 "semtech,int-comp-resistor", &res);
>                 if (ret)
> --
> https://chromeos.dev
>