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[2003:f6:5f0c:3200:f401:bf2b:6011:cd64]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058bb4b27sm9895239f8f.117.2024.10.28.09.08.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 09:08:10 -0700 (PDT) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Conor Dooley , David Lechner , Dumitru Ceclan , Jonathan Cameron , Krzysztof Kozlowski , Lars-Peter Clausen , Michael Hennerich , Nuno Sa , Rob Herring Cc: devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v2 0/4] iio: adc: ad7124: Make it work on de10-nano Date: Mon, 28 Oct 2024 17:07:49 +0100 Message-ID: <20241028160748.489596-6-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2183; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=IT+H+bTxJcRgKwTMvHVT/h+R8TgmjcAxngUaS/K/JWE=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnH7bVGghWcColz4VieIZh0b7JUi4GMgRpXaM1/ TWyVRs17kWJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZx+21QAKCRCPgPtYfRL+ TnbaB/9cnKAVNPyOD3rhRK/TDoyXQFBVRx61pWiwJUa7fKoAulgn61SiR672ZBr9lk30V4Uiewn 7TEY/n1hTPasmF6qkkEGd2LnKMP4tYtWgtpVvd5uVf+YKpCIJBn00U4oibuBVQ9TY6JZMhUi97o 1f9dQ5qGuW9e31NK18HmOQCTmktM8qcA49NG3H3b6LKOug/qRcNo+SfF+2sxlrWFrrW4bqxrdGF jH1IdR/0CV93m1bD033zOVvedfgeRNi5vJGXi8fyHhJcgwsn/zcRGbMt1LPEx2WPSk9I+/KjuD/ P/lQl4Eh6YLQhUbu61nmMOaQ85w9dMX9UEItJ1ZSL6d5wXAY X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Hello, this is iteration v2 to make ad7124 work on de10-nano. (Implicit) v1 is available at https://lore.kernel.org/linux-iio/20241024171703.201436-5-u.kleine-koenig@baylibre.com. The changes since v1: - Write 0 instead of 0x0001 to disable channels. While 0x0001 is the reset default value for these registers (apart from the channel 0 one) there is no sensible reason to use that value (i.e. AD7124_CHANNEL_AINP(0) | AD7124_CHANNEL_AINM(1)) as the value is reprogrammed before use anyhow. This addresses the feedback that the magic value 0x0001 should better be constructed using register bit field defintions. - Add maxItems: 1 to the new property defined in the binding patch (Krzysztof) - Rename property to rdy-gpios (Rob) - Use rdy-gpios only for gpio reading and continue using the usual irq defintion for the interrupt (Jonathan). I was surprised I can use both the GPIO as input and the matching irq. - patch #1 is new, and use GPIO_ACTIVE_LOW in the gpio descriptor instead of 2. Jonathan voiced concerns about the reliability of this solution and proposed to implement polling. I'm convinced the solution implemented here is robust, so I see no need to implement polling today. Still open questions: - Is rdy-gpios the right name. The line is named ̅R̅D̅Y, so maybe nrdy-gpios? Or nRDY-gpios? - Jonathan wanted some input from ADI about this series and the hardware details. Best regards Uwe Uwe Kleine-König (4): dt-bindings: iio: adc: adi,ad7124: Use symbolic name for interrupt flag dt-bindings: iio: adc: adi,ad7124: Allow specifications of a gpio for irq line iio: adc: ad_sigma_delta: Add support for reading irq status using a GPIO iio: adc: ad7124: Disable all channels at probe time .../bindings/iio/adc/adi,ad7124.yaml | 11 +++++- drivers/iio/adc/ad7124.c | 3 ++ drivers/iio/adc/ad_sigma_delta.c | 35 ++++++++++++++++--- include/linux/iio/adc/ad_sigma_delta.h | 1 + 4 files changed, 44 insertions(+), 6 deletions(-) base-commit: 9852d85ec9d492ebef56dc5f229416c925758edc