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[v4,0/9] iio: ad3552r-hs: add support for ad3541/42r

Message ID 20250114-wip-bl-ad3552r-axi-v0-iio-testing-carlos-v4-0-979402e33545@baylibre.com (mailing list archive)
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Series iio: ad3552r-hs: add support for ad3541/42r | expand

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Angelo Dureghello Jan. 14, 2025, 3:30 p.m. UTC
This patchset add support for ad3541/42r, 16MUPS, respectively
single and dual channel DACs, together with some minor fixes.

The ad354xr connect through a DSPI bus (while ad355xr through
QSPI), so a new fpga HDL supporting bus mode switch has been
developed to support them.

Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
---
Changes in v2:
- reproposing the patchset using platform data for bus mode
  change functionality,
- improve commit messages,
- add separate patch for instruction mode,
- add separate patch for sharing model data structures,
- remove error on wrong id,
- fix id detection info message in case of wrong id.

Changes in v3:
- improve commit messages,
- removed some not useful dev_err, 
- comment syntax fixes,
- add lock guards for bus mode change,
- remove externs for range tables.

Changes in v4:
- keep in still patch 1 and 2/9, that was already picked up, in particular
  the patch 1/9 is the same as in v2, the 2/9 has a minimal change:
  removed dev_err() message, so can be eventually be re-picked up,
- fix commit messages,
- add mode validation in axi_dac_bus_set_io_mode,
- use dev_warn() on wrong chip ID,
- fix instruction mode patch to unwrap properly on error.
- rename ad3552r_update_reg_bits to ad3552r_hs_update_reg_bits,
  to respect module name in the function name.

Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>

---
Angelo Dureghello (9):
      iio: dac: ad3552r-common: fix ad3541/2r ranges
      iio: dac: ad3552r-hs: clear reset status flag
      iio: dac: adi-axi-dac: modify stream enable
      iio: dac: adi-axi-dac: add bus mode setup
      iio: dac: ad3552r-hs: fix message on wrong chip id
      iio: dac: ad3552r-hs: use instruction mode for configuration
      iio: dac: ad3552r: share model data structures
      iio: dac: ad3552r-hs: add ad3541/2r support
      iio: dac: ad3552r-hs: update function name (non functional)

 drivers/iio/dac/ad3552r-common.c |  55 ++++++-
 drivers/iio/dac/ad3552r-hs.c     | 322 ++++++++++++++++++++++++++++++---------
 drivers/iio/dac/ad3552r-hs.h     |   8 +
 drivers/iio/dac/ad3552r.c        |  36 -----
 drivers/iio/dac/ad3552r.h        |  17 ++-
 drivers/iio/dac/adi-axi-dac.c    |  33 +++-
 6 files changed, 350 insertions(+), 121 deletions(-)
---
base-commit: d487a2869417596556c56b781f82ebeedaea6889
change-id: 20250114-wip-bl-ad3552r-axi-v0-iio-testing-carlos-762ff6c91edb

Best regards,

Comments

Jonathan Cameron Jan. 18, 2025, 4:11 p.m. UTC | #1
On Tue, 14 Jan 2025 16:30:09 +0100
Angelo Dureghello <adureghello@baylibre.com> wrote:

> This patchset add support for ad3541/42r, 16MUPS, respectively
> single and dual channel DACs, together with some minor fixes.
> 
> The ad354xr connect through a DSPI bus (while ad355xr through
> QSPI), so a new fpga HDL supporting bus mode switch has been
> developed to support them.
> 
> Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
All looks good to me. I've not applied it quite yet as there were
various reviewers contributing to feedback on v3 and I want
to give them more time for a last look.

We have plenty of time at this point in a cycle so no rush,
but if no feedback needing a v5 I'll probably pick the remainder
of this series up in a week or so.

Jonathan

> ---
> Changes in v2:
> - reproposing the patchset using platform data for bus mode
>   change functionality,
> - improve commit messages,
> - add separate patch for instruction mode,
> - add separate patch for sharing model data structures,
> - remove error on wrong id,
> - fix id detection info message in case of wrong id.
> 
> Changes in v3:
> - improve commit messages,
> - removed some not useful dev_err, 
> - comment syntax fixes,
> - add lock guards for bus mode change,
> - remove externs for range tables.
> 
> Changes in v4:
> - keep in still patch 1 and 2/9, that was already picked up, in particular
>   the patch 1/9 is the same as in v2, the 2/9 has a minimal change:
>   removed dev_err() message, so can be eventually be re-picked up,
> - fix commit messages,
> - add mode validation in axi_dac_bus_set_io_mode,
> - use dev_warn() on wrong chip ID,
> - fix instruction mode patch to unwrap properly on error.
> - rename ad3552r_update_reg_bits to ad3552r_hs_update_reg_bits,
>   to respect module name in the function name.
> 
> Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
> 
> ---
> Angelo Dureghello (9):
>       iio: dac: ad3552r-common: fix ad3541/2r ranges
>       iio: dac: ad3552r-hs: clear reset status flag
>       iio: dac: adi-axi-dac: modify stream enable
>       iio: dac: adi-axi-dac: add bus mode setup
>       iio: dac: ad3552r-hs: fix message on wrong chip id
>       iio: dac: ad3552r-hs: use instruction mode for configuration
>       iio: dac: ad3552r: share model data structures
>       iio: dac: ad3552r-hs: add ad3541/2r support
>       iio: dac: ad3552r-hs: update function name (non functional)
> 
>  drivers/iio/dac/ad3552r-common.c |  55 ++++++-
>  drivers/iio/dac/ad3552r-hs.c     | 322 ++++++++++++++++++++++++++++++---------
>  drivers/iio/dac/ad3552r-hs.h     |   8 +
>  drivers/iio/dac/ad3552r.c        |  36 -----
>  drivers/iio/dac/ad3552r.h        |  17 ++-
>  drivers/iio/dac/adi-axi-dac.c    |  33 +++-
>  6 files changed, 350 insertions(+), 121 deletions(-)
> ---
> base-commit: d487a2869417596556c56b781f82ebeedaea6889
> change-id: 20250114-wip-bl-ad3552r-axi-v0-iio-testing-carlos-762ff6c91edb
> 
> Best regards,
Jonathan Cameron Jan. 25, 2025, 12:10 p.m. UTC | #2
On Sat, 18 Jan 2025 16:11:01 +0000
Jonathan Cameron <jic23@kernel.org> wrote:

> On Tue, 14 Jan 2025 16:30:09 +0100
> Angelo Dureghello <adureghello@baylibre.com> wrote:
> 
> > This patchset add support for ad3541/42r, 16MUPS, respectively
> > single and dual channel DACs, together with some minor fixes.
> > 
> > The ad354xr connect through a DSPI bus (while ad355xr through
> > QSPI), so a new fpga HDL supporting bus mode switch has been
> > developed to support them.
> > 
> > Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>  
> All looks good to me. I've not applied it quite yet as there were
> various reviewers contributing to feedback on v3 and I want
> to give them more time for a last look.
> 
> We have plenty of time at this point in a cycle so no rush,
> but if no feedback needing a v5 I'll probably pick the remainder
> of this series up in a week or so.
Applied 3-9 (first two already on tree as you say below)
For now just pushed out as testing.
There is time for more comments / tags etc if anyone wants
to give them as I'll be rebasing on rc1 after next Sunday anyway.

Thanks,

Jonathan

> 
> Jonathan
> 
> > ---
> > Changes in v2:
> > - reproposing the patchset using platform data for bus mode
> >   change functionality,
> > - improve commit messages,
> > - add separate patch for instruction mode,
> > - add separate patch for sharing model data structures,
> > - remove error on wrong id,
> > - fix id detection info message in case of wrong id.
> > 
> > Changes in v3:
> > - improve commit messages,
> > - removed some not useful dev_err, 
> > - comment syntax fixes,
> > - add lock guards for bus mode change,
> > - remove externs for range tables.
> > 
> > Changes in v4:
> > - keep in still patch 1 and 2/9, that was already picked up, in particular
> >   the patch 1/9 is the same as in v2, the 2/9 has a minimal change:
> >   removed dev_err() message, so can be eventually be re-picked up,
> > - fix commit messages,
> > - add mode validation in axi_dac_bus_set_io_mode,
> > - use dev_warn() on wrong chip ID,
> > - fix instruction mode patch to unwrap properly on error.
> > - rename ad3552r_update_reg_bits to ad3552r_hs_update_reg_bits,
> >   to respect module name in the function name.
> > 
> > Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
> > 
> > ---
> > Angelo Dureghello (9):
> >       iio: dac: ad3552r-common: fix ad3541/2r ranges
> >       iio: dac: ad3552r-hs: clear reset status flag
> >       iio: dac: adi-axi-dac: modify stream enable
> >       iio: dac: adi-axi-dac: add bus mode setup
> >       iio: dac: ad3552r-hs: fix message on wrong chip id
> >       iio: dac: ad3552r-hs: use instruction mode for configuration
> >       iio: dac: ad3552r: share model data structures
> >       iio: dac: ad3552r-hs: add ad3541/2r support
> >       iio: dac: ad3552r-hs: update function name (non functional)
> > 
> >  drivers/iio/dac/ad3552r-common.c |  55 ++++++-
> >  drivers/iio/dac/ad3552r-hs.c     | 322 ++++++++++++++++++++++++++++++---------
> >  drivers/iio/dac/ad3552r-hs.h     |   8 +
> >  drivers/iio/dac/ad3552r.c        |  36 -----
> >  drivers/iio/dac/ad3552r.h        |  17 ++-
> >  drivers/iio/dac/adi-axi-dac.c    |  33 +++-
> >  6 files changed, 350 insertions(+), 121 deletions(-)
> > ---
> > base-commit: d487a2869417596556c56b781f82ebeedaea6889
> > change-id: 20250114-wip-bl-ad3552r-axi-v0-iio-testing-carlos-762ff6c91edb
> > 
> > Best regards,  
> 
>